JPS644097U - - Google Patents

Info

Publication number
JPS644097U
JPS644097U JP9993587U JP9993587U JPS644097U JP S644097 U JPS644097 U JP S644097U JP 9993587 U JP9993587 U JP 9993587U JP 9993587 U JP9993587 U JP 9993587U JP S644097 U JPS644097 U JP S644097U
Authority
JP
Japan
Prior art keywords
output
terminal
thyristor
circuit
supplied
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9993587U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP9993587U priority Critical patent/JPS644097U/ja
Publication of JPS644097U publication Critical patent/JPS644097U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本案品の正面図、第2図は側面図、第
3図Aは電源回路の結線図、第3図Bは制御回路
の結線図である。 8はバツフア、9はEX−OR素子、10はJ
Kフリツプフロツプ。
Fig. 1 is a front view of the product, Fig. 2 is a side view, Fig. 3A is a wiring diagram of the power supply circuit, and Fig. 3B is a wiring diagram of the control circuit. 8 is buffer, 9 is EX-OR element, 10 is J
K flipflop.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ランプがサイリスタに接続され該サイリスタが
受光素子の出力に応じて自動的に点弧又は消弧さ
れる自動点滅装置において、前記サイリスタのゲ
ートに出力端が接続されたEX−OR回路と前記
受光素子出力を2値出力に変換する回路と反転用
スイツチがCK端子に接続される端子及びPR端
子をH、端子をLに固定され、R端子に前記変
換回路の出力が供給されるJK−FFとからなり
、前記EX−ORの入力には前記JK−FFのQ
出力と前記変換回路出力が夫々供給されてなる強
制消灯可能な自動点滅装置。
In an automatic flashing device in which a lamp is connected to a thyristor and the thyristor is automatically turned on or off according to the output of a light receiving element, an EX-OR circuit whose output end is connected to a gate of the thyristor and the light receiving element A circuit for converting an output into a binary output, a terminal to which an inverting switch is connected to a CK terminal, and a JK-FF in which the PR terminal is fixed to H, the terminal is fixed to L, and the output of the conversion circuit is supplied to the R terminal. The input of the EX-OR is the Q of the JK-FF.
An automatic flashing device capable of forcibly turning off the light, which is supplied with an output and an output of the conversion circuit.
JP9993587U 1987-06-29 1987-06-29 Pending JPS644097U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9993587U JPS644097U (en) 1987-06-29 1987-06-29

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9993587U JPS644097U (en) 1987-06-29 1987-06-29

Publications (1)

Publication Number Publication Date
JPS644097U true JPS644097U (en) 1989-01-11

Family

ID=31327552

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9993587U Pending JPS644097U (en) 1987-06-29 1987-06-29

Country Status (1)

Country Link
JP (1) JPS644097U (en)

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