JPS6447092A - Soldering method of surface packaging component - Google Patents

Soldering method of surface packaging component

Info

Publication number
JPS6447092A
JPS6447092A JP62205794A JP20579487A JPS6447092A JP S6447092 A JPS6447092 A JP S6447092A JP 62205794 A JP62205794 A JP 62205794A JP 20579487 A JP20579487 A JP 20579487A JP S6447092 A JPS6447092 A JP S6447092A
Authority
JP
Japan
Prior art keywords
land
space
solder resist
packaging component
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62205794A
Other languages
Japanese (ja)
Inventor
Michiharu Abe
Misao Kikuchi
Katsuki Matsunaga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP62205794A priority Critical patent/JPS6447092A/en
Publication of JPS6447092A publication Critical patent/JPS6447092A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/303—Assembling printed circuits with electric components, e.g. with resistors with surface mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

PURPOSE:To secure a soldering layer having at least a minimum thickness, by making the height of a protecting part provided by applying and curing a solder resist in the vicinity of a land of a circuit board high enough to obtain a space for securing the soldering layer having a predetermined thickness at a space between a land surface and a electrode of a surface packaging component. CONSTITUTION:A solder resist 3 is applied to a wiring pattern except a land 2 on a circuit board 1 in a previous process. In order to support a center portion of a double end electrode 4a of a chip capacitor, a projecting part 7 slightly higher than the surface of the land 2 is formed by further applying and curing a solder resist between the land 2 and the land 2. The height of the projecting part 7 is set so as to form a space for securing a soldering layer of approximately 0.1mm-0.5mm at a space between the surface of the land 2 and the electrode 4a when a surface packaging component is supported. The solder resist forming the projecting component 7 is applied by a silk screen printing method.
JP62205794A 1987-08-18 1987-08-18 Soldering method of surface packaging component Pending JPS6447092A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62205794A JPS6447092A (en) 1987-08-18 1987-08-18 Soldering method of surface packaging component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62205794A JPS6447092A (en) 1987-08-18 1987-08-18 Soldering method of surface packaging component

Publications (1)

Publication Number Publication Date
JPS6447092A true JPS6447092A (en) 1989-02-21

Family

ID=16512791

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62205794A Pending JPS6447092A (en) 1987-08-18 1987-08-18 Soldering method of surface packaging component

Country Status (1)

Country Link
JP (1) JPS6447092A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0365274U (en) * 1989-10-30 1991-06-25
JPH0463674U (en) * 1990-10-15 1992-05-29

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0365274U (en) * 1989-10-30 1991-06-25
JPH0463674U (en) * 1990-10-15 1992-05-29

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