JPS6447110A - Receiver - Google Patents

Receiver

Info

Publication number
JPS6447110A
JPS6447110A JP20375387A JP20375387A JPS6447110A JP S6447110 A JPS6447110 A JP S6447110A JP 20375387 A JP20375387 A JP 20375387A JP 20375387 A JP20375387 A JP 20375387A JP S6447110 A JPS6447110 A JP S6447110A
Authority
JP
Japan
Prior art keywords
agc
shunt
circuit
delay
mixer circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20375387A
Other languages
Japanese (ja)
Inventor
Giichi Maekawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP20375387A priority Critical patent/JPS6447110A/en
Publication of JPS6447110A publication Critical patent/JPS6447110A/en
Pending legal-status Critical Current

Links

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  • Control Of Amplification And Gain Control (AREA)

Abstract

PURPOSE:To prevent the deterioration in the resistance to disturbance by adopting a double balanced type mixer circuit and applying shunt type delay AGC to a reception signal and a local oscillation signal supplied to the mixer circuit thereby extending the range of AGC. CONSTITUTION:When the input level is smaller than a prescribed v1. AGC is applied by an intermediate frequency amplifier 8 and shunt AGC is applied to a reception signal Sr by an AGC circuit 21 when the level is larger than the V1. Moreover, when the input exceeds a prescribed voltage V2, an AGC circuit 22 applies shunt AGC to a local oscillation signal So. Since the shunt AGC is to both the signals Sr, So in a delay form where the start level differs thereby offering the AGC with a wide range. The double balanced mixer circuit is employed and a delay type shunt AGC is applied in this way so as to prevent the deterioration in the resistance to disturbance.
JP20375387A 1987-08-17 1987-08-17 Receiver Pending JPS6447110A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20375387A JPS6447110A (en) 1987-08-17 1987-08-17 Receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20375387A JPS6447110A (en) 1987-08-17 1987-08-17 Receiver

Publications (1)

Publication Number Publication Date
JPS6447110A true JPS6447110A (en) 1989-02-21

Family

ID=16479267

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20375387A Pending JPS6447110A (en) 1987-08-17 1987-08-17 Receiver

Country Status (1)

Country Link
JP (1) JPS6447110A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1496210A3 (en) * 2003-06-25 2007-11-21 HONDA MOTOR CO., Ltd. Outboard motor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1496210A3 (en) * 2003-06-25 2007-11-21 HONDA MOTOR CO., Ltd. Outboard motor

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