JPS6449266A - Transistor - Google Patents

Transistor

Info

Publication number
JPS6449266A
JPS6449266A JP20673887A JP20673887A JPS6449266A JP S6449266 A JPS6449266 A JP S6449266A JP 20673887 A JP20673887 A JP 20673887A JP 20673887 A JP20673887 A JP 20673887A JP S6449266 A JPS6449266 A JP S6449266A
Authority
JP
Japan
Prior art keywords
transistor
spacers
conductive films
microminiaturization
characteristic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20673887A
Other languages
Japanese (ja)
Inventor
Hiroko Kuriyama
Takashi Taniguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP20673887A priority Critical patent/JPS6449266A/en
Publication of JPS6449266A publication Critical patent/JPS6449266A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To contrive the microminiaturization for a transistor by a method wherein a spacer is formed by a conductive film and an insulating film as its upper layer so as to eliminate a deterioration in a characteristic such as a variation in a threshold value or the like. CONSTITUTION:Spacers 13 which have been formed on side walls of a gate oxide film 12 formed on a semiconductor substrate 18 and a gate electrode 11 and which act as masks for implantation of impurity ions to form high- concentration diffusion regions are formed by lower-layer conductive films 15 and insulating films 13 on the conductive films 15. Then, even when a hot carrier is generated and penetrates into the spacers 13, it is not trapped because the spacers 13 on drains 16 are the conductive films 15. By this setup, a characteristic of a transistor is not deteriorated; it is made possible to realize a microminiaturization for a transistor.
JP20673887A 1987-08-20 1987-08-20 Transistor Pending JPS6449266A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20673887A JPS6449266A (en) 1987-08-20 1987-08-20 Transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20673887A JPS6449266A (en) 1987-08-20 1987-08-20 Transistor

Publications (1)

Publication Number Publication Date
JPS6449266A true JPS6449266A (en) 1989-02-23

Family

ID=16528285

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20673887A Pending JPS6449266A (en) 1987-08-20 1987-08-20 Transistor

Country Status (1)

Country Link
JP (1) JPS6449266A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5235203A (en) * 1991-06-27 1993-08-10 Motorola, Inc. Insulated gate field effect transistor having vertically layered elevated source/drain structure
US5319231A (en) * 1991-01-11 1994-06-07 Semiconductor Energy Laboratory Co., Ltd. Insulated gate semiconductor device having an elevated plateau like portion

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5319231A (en) * 1991-01-11 1994-06-07 Semiconductor Energy Laboratory Co., Ltd. Insulated gate semiconductor device having an elevated plateau like portion
US5235203A (en) * 1991-06-27 1993-08-10 Motorola, Inc. Insulated gate field effect transistor having vertically layered elevated source/drain structure

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