JPS6449415A - Delay circuit - Google Patents

Delay circuit

Info

Publication number
JPS6449415A
JPS6449415A JP62207454A JP20745487A JPS6449415A JP S6449415 A JPS6449415 A JP S6449415A JP 62207454 A JP62207454 A JP 62207454A JP 20745487 A JP20745487 A JP 20745487A JP S6449415 A JPS6449415 A JP S6449415A
Authority
JP
Japan
Prior art keywords
capacitor
delay time
constant current
voltage
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62207454A
Other languages
Japanese (ja)
Inventor
Masao Yamada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62207454A priority Critical patent/JPS6449415A/en
Publication of JPS6449415A publication Critical patent/JPS6449415A/en
Pending legal-status Critical Current

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  • Pulse Circuits (AREA)

Abstract

PURPOSE:To easily set a delay time, by obtaining the delay time by charging a capacitor from a constant current circuit. CONSTITUTION:When an input pulse goes to a low level, the constant current circuit 2 is operated, and a voltage directly proportional to a time when the charge of the capacitor 3 is started can be obtained at a capacitor terminal. When the voltage impressed on the capacitor terminal exceeds a comparator voltage in a buffer circuit 4, the output of the buffer circuit 4 goes to the low level. Therefore, the delay time can be obtained in a waveform obtained at an output terminal 6 via an OR gate circuit 5. For example, assuming the capacitor 3 as 10PF, a constant current value as 100mu A, and the comparator voltage as 1.5V, the delay time of 15ns can be obtained.
JP62207454A 1987-08-20 1987-08-20 Delay circuit Pending JPS6449415A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62207454A JPS6449415A (en) 1987-08-20 1987-08-20 Delay circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62207454A JPS6449415A (en) 1987-08-20 1987-08-20 Delay circuit

Publications (1)

Publication Number Publication Date
JPS6449415A true JPS6449415A (en) 1989-02-23

Family

ID=16540036

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62207454A Pending JPS6449415A (en) 1987-08-20 1987-08-20 Delay circuit

Country Status (1)

Country Link
JP (1) JPS6449415A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61177019A (en) * 1985-01-31 1986-08-08 Matsushita Electric Ind Co Ltd Pulse stretch circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61177019A (en) * 1985-01-31 1986-08-08 Matsushita Electric Ind Co Ltd Pulse stretch circuit

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