JPS645191A - Composite signal separating circuit - Google Patents

Abstract

PURPOSE:To reduce a hardware quantity without any deterioration in performance by reducing necessary memory capacity for a delay circuit by using a subordinate sample circuit enabling up to the demodulation of an I signal and a Q signal. CONSTITUTION:This composite signal separating circuit has subordinate sample circuits 131 and 141 which perform subordinate sampling a digital video signal DVS sampled at 4fsc (fsc: color subcarrier frequency) by using a frequency fsc and subordinate sample circuits 161 and 171 which perform subordinate sampling at fsc having a pi/2 phase difference from the operation phase of the circuits, and performs frame arithmetic operation and line arithmetic operation for I and Q signals obtained by said circuits individually to demodulate the I and Q signals. Then the demodulation outputs are subtracted from the digital video signal to obtain luminance signals. As a result of data reduction by the subordinate sampling, the capacity of a memory is reduced to 1/4 as large as before on the I processing side and to 1/4 on the Q processing side, i.e. 1/2 in total. Further, IQ modulation becomes possible by the subordinate sampling, so another IQ demodulating circuit need not be provided. Consequently, the hardware quantity is reduced.