JPS645541U - - Google Patents

Info

Publication number
JPS645541U
JPS645541U JP9940187U JP9940187U JPS645541U JP S645541 U JPS645541 U JP S645541U JP 9940187 U JP9940187 U JP 9940187U JP 9940187 U JP9940187 U JP 9940187U JP S645541 U JPS645541 U JP S645541U
Authority
JP
Japan
Prior art keywords
tuner
output
comparator
integrator
switching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9940187U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP9940187U priority Critical patent/JPS645541U/ja
Publication of JPS645541U publication Critical patent/JPS645541U/ja
Pending legal-status Critical Current

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  • Noise Elimination (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例の構成を示すブロツ
ク図。第2図は従来例の構成を示すブロツク図。 1および2…中間周波増幅、検波器、3…信号
切替スイツチ、5および6…バンドパスフイルタ
、7および8…直流減算器、9および25…比較
器、13および14…フロントエンド、15およ
び16…バツフア増幅器、22…コンパレータ出
力切替スイツチ、23および24…積分器、26
…加算器、27…判別器。
FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. FIG. 2 is a block diagram showing the configuration of a conventional example. 1 and 2...Intermediate frequency amplification, detector, 3...Signal changeover switch, 5 and 6...Band pass filter, 7 and 8...DC subtractor, 9 and 25...Comparator, 13 and 14...Front end, 15 and 16 ...Buffer amplifier, 22...Comparator output changeover switch, 23 and 24...Integrator, 26
...Adder, 27...Discriminator.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 第1のチユーナおよび第2のチユーナと、第1
のチユーナの検波出力と第2のチユーナの検波出
力とを切替えて後段に供給する信号切替手段と、
チユーナ・シグナルメータ出力の直流分からマル
チパスノイズを減算したそれぞれのチユーブに対
するレベルを比較する第1比較器と、第1のチユ
ーナのマルチパスノイズを積分する第1の積分器
と、第2のチユーナのマルチパスノイズを積分す
る第2の積分器と、第1の積分器の出力レベルと
第2の積分器の出力レベルとを比較する第2比較
器と、第1比較器の両入力の和が所定値以上か否
かを判別しかつ判別出力により第1比較器の出力
または第2比較器の出力を選択する判別手段とを
備え、判別手段により選択された一方の比較器の
出力により信号切替手段を切替えることを特徴と
するFMチユーナのスペースダイバーシテイ装置
a first tuner, a second tuner, and a first tuner;
a signal switching means for switching between the detection output of the first tuner and the detection output of the second tuner and supplying the same to a subsequent stage;
A first comparator that compares the levels for each tube after subtracting multipath noise from the direct current output of the tuner/signal meter output, a first integrator that integrates the multipath noise of the first tuner, and a second tuner. a second integrator that integrates multipath noise, a second comparator that compares the output level of the first integrator and the output level of the second integrator, and the sum of both inputs of the first comparator. determination means for determining whether or not is greater than a predetermined value and selecting the output of the first comparator or the output of the second comparator based on the determination output; An FM tuner space diversity device characterized by switching switching means.
JP9940187U 1987-06-30 1987-06-30 Pending JPS645541U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9940187U JPS645541U (en) 1987-06-30 1987-06-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9940187U JPS645541U (en) 1987-06-30 1987-06-30

Publications (1)

Publication Number Publication Date
JPS645541U true JPS645541U (en) 1989-01-12

Family

ID=31326526

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9940187U Pending JPS645541U (en) 1987-06-30 1987-06-30

Country Status (1)

Country Link
JP (1) JPS645541U (en)

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