JPS6468937A - Chip-map formation - Google Patents

Chip-map formation

Info

Publication number
JPS6468937A
JPS6468937A JP22519087A JP22519087A JPS6468937A JP S6468937 A JPS6468937 A JP S6468937A JP 22519087 A JP22519087 A JP 22519087A JP 22519087 A JP22519087 A JP 22519087A JP S6468937 A JPS6468937 A JP S6468937A
Authority
JP
Japan
Prior art keywords
chip
wafer
center
point
vicinity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22519087A
Other languages
Japanese (ja)
Inventor
Toshihiko Motoki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP22519087A priority Critical patent/JPS6468937A/en
Publication of JPS6468937A publication Critical patent/JPS6468937A/en
Pending legal-status Critical Current

Links

Landscapes

  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

PURPOSE:To specify a chip at an outer end and to shorten a computing time for determining the effectiveness of the chip, by obtaining positional relation of each chip with respect to a wafer, based on the position of center of the wafer, the radius of the wafer, the position of one chip in the vicinity of the center of the wafer and index sizes in the directions of (x) and (y), which are set beforehand. CONSTITUTION:The position of a center 1 of a chip in the vicinity of the center of a wafer is expressed with coordinates X and Y of a position, where an X stage 11 and a Y stage 12 are driven and the probe of a probe card 20 agrees with the bonding pad of the chip in the vicinity of the wafer. The position of a wafer center 2 and a radius R of the wafer are measured by using an electrostatic sensor 17, a camera 18 and an image recognizing device 24. A chip map is formed based on these data. At first, an intersection O (Ox, Oy), which is obtained by extending the center of the outermost chip leftward viewed from the directions of (x) and (y), is obtained by the expression l. Then a point S (nt, m1) at the upper left part, which is moved from the point 0 in the directions (x) and (y) by every 1/2 index, is computed. This point is a starting point for obtaining the position of the chip at the outer end.
JP22519087A 1987-09-10 1987-09-10 Chip-map formation Pending JPS6468937A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22519087A JPS6468937A (en) 1987-09-10 1987-09-10 Chip-map formation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22519087A JPS6468937A (en) 1987-09-10 1987-09-10 Chip-map formation

Publications (1)

Publication Number Publication Date
JPS6468937A true JPS6468937A (en) 1989-03-15

Family

ID=16825377

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22519087A Pending JPS6468937A (en) 1987-09-10 1987-09-10 Chip-map formation

Country Status (1)

Country Link
JP (1) JPS6468937A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0580895A3 (en) * 1992-07-24 1994-03-09 Fujitsu Ltd
JP2007281340A (en) * 2006-04-11 2007-10-25 Jeol Ltd Semiconductor wafer edge inspection system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0580895A3 (en) * 1992-07-24 1994-03-09 Fujitsu Ltd
JP2007281340A (en) * 2006-04-11 2007-10-25 Jeol Ltd Semiconductor wafer edge inspection system

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