JPS6471340A - Line setting circuit - Google Patents

Line setting circuit

Info

Publication number
JPS6471340A
JPS6471340A JP22890187A JP22890187A JPS6471340A JP S6471340 A JPS6471340 A JP S6471340A JP 22890187 A JP22890187 A JP 22890187A JP 22890187 A JP22890187 A JP 22890187A JP S6471340 A JPS6471340 A JP S6471340A
Authority
JP
Japan
Prior art keywords
data
storage
written
line setting
switch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22890187A
Other languages
Japanese (ja)
Inventor
Shinzo Tsurumaki
Kunio Takada
Masashi Oba
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP22890187A priority Critical patent/JPS6471340A/en
Publication of JPS6471340A publication Critical patent/JPS6471340A/en
Pending legal-status Critical Current

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  • Time-Division Multiplex Systems (AREA)

Abstract

PURPOSE:To reduce remarkably the write time of setting data from a line setting device by adding a storage means as a buffer memory. CONSTITUTION:Input data is written in a data setting memory 200 via a contact 500 of 1st switch and written in a storage means 710 (buffer memory) via a contact 510 of a 2nd switch. A storage means 710 uses a control signal from a storage control means 750 to read the data written newly by the control signal from the storage control means 750 and writes it in a storage circuit 700. In the start of power supply, the data stored in the storage circuit by the control signal is read and written in a data setting memory 200 via a contact 500 of the 1st switch. The write time from the line setting device is reduced remarkably.
JP22890187A 1987-09-11 1987-09-11 Line setting circuit Pending JPS6471340A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22890187A JPS6471340A (en) 1987-09-11 1987-09-11 Line setting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22890187A JPS6471340A (en) 1987-09-11 1987-09-11 Line setting circuit

Publications (1)

Publication Number Publication Date
JPS6471340A true JPS6471340A (en) 1989-03-16

Family

ID=16883634

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22890187A Pending JPS6471340A (en) 1987-09-11 1987-09-11 Line setting circuit

Country Status (1)

Country Link
JP (1) JPS6471340A (en)

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