JPS6473423A - Instruction look-ahead controller - Google Patents

Instruction look-ahead controller

Info

Publication number
JPS6473423A
JPS6473423A JP62230117A JP23011787A JPS6473423A JP S6473423 A JPS6473423 A JP S6473423A JP 62230117 A JP62230117 A JP 62230117A JP 23011787 A JP23011787 A JP 23011787A JP S6473423 A JPS6473423 A JP S6473423A
Authority
JP
Japan
Prior art keywords
instruction
buffer
branching
stored
branch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62230117A
Other languages
Japanese (ja)
Inventor
Tsunezo Adachi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP62230117A priority Critical patent/JPS6473423A/en
Publication of JPS6473423A publication Critical patent/JPS6473423A/en
Pending legal-status Critical Current

Links

Landscapes

  • Advance Control (AREA)

Abstract

PURPOSE:To prevent the deterioration of performance due to branching by the aid of a simple constituting element by using dynamically a part of a usual instruction buffer. CONSTITUTION:When branching instruction is decoded while the instruction buffer of 0-1-2-3 system is being used, the instruction of branch destination is stored in a buffer 0', and in such a state, the decision of a branching condition is waited, and when the branch is realized, the instruction stored in the buffer 0' is used, and the instruction after the subsequent instruction is looked ahead by using the buffer 1-2-3. At that time, the buffer 0 is made vacant in order to provide for the next branching instruction. When the branch is not realized, the instruction stored in the buffer of 0-1-2-3 system is used as it is, and the instruction stored in the buffer 0' is canceled, and the buffer 0' is made vacant for the next branching instruction. Thus, the deterioration of the performance due to the processing of the branching instruction can be prevented.
JP62230117A 1987-09-14 1987-09-14 Instruction look-ahead controller Pending JPS6473423A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62230117A JPS6473423A (en) 1987-09-14 1987-09-14 Instruction look-ahead controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62230117A JPS6473423A (en) 1987-09-14 1987-09-14 Instruction look-ahead controller

Publications (1)

Publication Number Publication Date
JPS6473423A true JPS6473423A (en) 1989-03-17

Family

ID=16902839

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62230117A Pending JPS6473423A (en) 1987-09-14 1987-09-14 Instruction look-ahead controller

Country Status (1)

Country Link
JP (1) JPS6473423A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02301833A (en) * 1989-05-17 1990-12-13 Sony Tektronix Corp Pipeline processing method
US5381532A (en) * 1989-08-28 1995-01-10 Nec Corporation Microprocessor having branch aligner between branch buffer and instruction decoder unit for enhancing initiation of data processing after execution of conditional branch instruction

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02301833A (en) * 1989-05-17 1990-12-13 Sony Tektronix Corp Pipeline processing method
US5381532A (en) * 1989-08-28 1995-01-10 Nec Corporation Microprocessor having branch aligner between branch buffer and instruction decoder unit for enhancing initiation of data processing after execution of conditional branch instruction

Similar Documents

Publication Publication Date Title
AU575352B2 (en) Buffer system
DE3884002D1 (en) Glass fiber reinforced polyolefin composition.
NO915080A (en) Meth. FOREVER. OF CRYSTALLINIC MICROPOROUS SIAL PHOSPHATES WITH CONTR. SI CONTENTS, CRYSTALLINIC MICROPOROUS SIAL PHOSPHATES WITH IMPROVED STABILITY AGAINST DEACTIVATION AND ANY USE OF THESE IN THE PREPARATION OF METHOD OLEFINES
FI951266L (en) Microbial-killing detergent-iodine compositions with reduced detergent content
GB9108327D0 (en) High performance dual mode integral propulsion system
DE3750683D1 (en) Reflector-type lamp with reduced focal loss.
AU2238283A (en) Cloning nucleotides for bovine growth hormone
FI954914A7 (en) Compositions containing hyaluronic acid and an NSAID for inhibiting, regulating or regressing angiogenesis
EP0598346A3 (en) Double buffer scheme for variable length decoder.
JPS6473423A (en) Instruction look-ahead controller
EP0806821A3 (en) Polirazed superfluorescent fiber sources
AU2521388A (en) Hydrocyclone overflow transport
FI842169L (en) PREFERENCES FOR WINES.
EP0275546A3 (en) Error-correcting decoder for rapidly dealing with buffer overflow
NO874738L (en) SHIP HAND FOR SMALL VESSELS AND HIGH SPEEDS.
DE3765342D1 (en) TRANSPORT SYSTEM WITH BUFFER STOCK.
DE68919049D1 (en) Queue cache control system.
FI872310A7 (en) Method for recovering indium, germanium and/or gallium.
JPS5597643A (en) Branch control unit
FR2676984B1 (en) SAIL FOR BOAT, PARTICULARLY FRONT SAIL.
DE3878309D1 (en) CORRECTION Buffer.
DK346387D0 (en) PROCEDURE FOR REDUCING THE ALKALIA CONTENT IN CEMENT CLINKS
JPS57188160A (en) Decentralized managing loop transmission system
JPS5638645A (en) Digital output change-over system in duplex system
KR880015005U (en) Stopper to prevent impurities from entering the bottle