JPS647468U - - Google Patents
Info
- Publication number
- JPS647468U JPS647468U JP1987100789U JP10078987U JPS647468U JP S647468 U JPS647468 U JP S647468U JP 1987100789 U JP1987100789 U JP 1987100789U JP 10078987 U JP10078987 U JP 10078987U JP S647468 U JPS647468 U JP S647468U
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- base
- video signal
- video
- emitter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 1
Description
第１図は本考案の一実施例のビデオ入力切替回
路の回路図である。
FIG. 1 is a circuit diagram of a video input switching circuit according to an embodiment of the present invention.
Claims (1)
スタのベースに外部入力ビデオ信号を、他方のト
ランジスタに内部入力ビデオ信号を接続し、切替
電圧により両トランジスタのベースバイアスを差
動的に制御することにより上記ビデオ信号の一方
をエミツタに選択的に取り出すようにしたビデオ
入力切替回路において、 上記した外部ビデオ信号を別のトランジスタの
ベースに接続して該別のトランジスタのコレクタ
を上記一方のトランジスタのベースに接続し、且
つ上記一方のトランジスタのベースに印加する切
替電圧を上記他方のトランジスタのベースに印加
する切替電圧よりも高く設定したことを特徴とす
るビデオ入力切替回路。 (2) 上記別のトランジスタのベースバイアスと
して、上記差動接続のトランジスタのエミツタに
現れる電圧を利用したことを特徴とする実用新案
登録請求の範囲第１項記載のビデオ入力切替回路
。[Claims for Utility Model Registration] (1) An external input video signal is connected to the base of one of the differentially connected transistors, an internal input video signal is connected to the other transistor, and the base bias of both transistors is controlled by a switching voltage. In a video input switching circuit in which one of the above video signals is selectively taken out to the emitter by differential control, the above external video signal is connected to the base of another transistor and the collector of the other transistor is connected. is connected to the base of the one transistor, and the switching voltage applied to the base of the one transistor is set higher than the switching voltage applied to the base of the other transistor. (2) The video input switching circuit according to claim 1, wherein the voltage appearing at the emitter of the differentially connected transistor is used as the base bias of the other transistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987100789U JPS647468U (en) | 1987-06-30 | 1987-06-30 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987100789U JPS647468U (en) | 1987-06-30 | 1987-06-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS647468U true JPS647468U (en) | 1989-01-17 |
Family
ID=31329186
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987100789U Pending JPS647468U (en) | 1987-06-30 | 1987-06-30 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS647468U (en) |
-
1987
- 1987-06-30 JP JP1987100789U patent/JPS647468U/ja active Pending
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