JPS647628A - Semiconductor device and manufacture thereof - Google Patents
Semiconductor device and manufacture thereofInfo
- Publication number
- JPS647628A JPS647628A JP62161333A JP16133387A JPS647628A JP S647628 A JPS647628 A JP S647628A JP 62161333 A JP62161333 A JP 62161333A JP 16133387 A JP16133387 A JP 16133387A JP S647628 A JPS647628 A JP S647628A
- Authority
- JP
- Japan
- Prior art keywords
- chip
- pads
- leads
- bonding
- longitudinal direction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/59—Bond pads specially adapted therefor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/853—On the same surface
- H10W72/865—Die-attach connectors and bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/931—Shapes of bond pads
- H10W72/932—Plan-view shape, i.e. in top view
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/981—Auxiliary members, e.g. spacers
- H10W72/983—Reinforcing structures, e.g. collars
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Wire Bonding (AREA)
Abstract
PURPOSE:To house a large chip in a small package, to reduce thermal stress of a wire bonded section, to obtain a lead burying length and to decrease the influence of a mechanical stress at the time of forming leads by arraying a bonding pad substantially at the center of an LSI chip on a linear line in the longitudinal direction of a chip. CONSTITUTION:A plurality of bonding pads 1 are provided on a rectangular LSI chip 5, leads 7 are radially arranged on the peripheral edge of the chip 5, and the pads 1 are electrically connected by wire bonding to one ends of the leads 7. The pads 1 of a semiconductor device having a resin sealing package 9 of such a structure are arrayed substantially at the center of the chip 5 on a linear line in the longitudinal direction of the chip 5. For example, the surface of the chip 5 except the pads 1 is covered with a heat resistant electric insulating film 10, the covered surface and the rear face of a lead frame 6 are bonded fixedly in such a manner that the pads 1 oppose the ends of the leads 7, and the pads 1 are wire bonded to the end surfaces of the leads 7.
Priority Applications (7)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62161333A JPH0777226B2 (en) | 1987-06-30 | 1987-06-30 | Semiconductor device and manufacturing method thereof |
| KR1019880007311A KR960013778B1 (en) | 1987-06-30 | 1988-06-17 | Semiconductor memory |
| US07/640,584 US5184208A (en) | 1987-06-30 | 1991-01-14 | Semiconductor device |
| KR1019920012675A KR970004216B1 (en) | 1987-06-30 | 1992-07-16 | Semiconductor memory |
| US08/000,125 US5365113A (en) | 1987-06-30 | 1993-01-04 | Semiconductor device |
| US08/329,824 US5514905A (en) | 1987-06-30 | 1994-10-27 | Semiconductor device |
| US08/458,166 US5742101A (en) | 1987-06-30 | 1995-06-02 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62161333A JPH0777226B2 (en) | 1987-06-30 | 1987-06-30 | Semiconductor device and manufacturing method thereof |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8191868A Division JP2911409B2 (en) | 1996-07-22 | 1996-07-22 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS647628A true JPS647628A (en) | 1989-01-11 |
| JPH0777226B2 JPH0777226B2 (en) | 1995-08-16 |
Family
ID=15733088
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62161333A Expired - Fee Related JPH0777226B2 (en) | 1987-06-30 | 1987-06-30 | Semiconductor device and manufacturing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0777226B2 (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0433695A3 (en) * | 1989-12-22 | 1991-10-02 | Texas Instruments Incorporated | Integrated circuit device and method to prevent cracking during surface mount |
| JPH08241937A (en) * | 1996-03-21 | 1996-09-17 | Hitachi Ltd | Semiconductor device |
| JPH08255854A (en) * | 1996-03-21 | 1996-10-01 | Hitachi Ltd | Semiconductor device and manufacturing method thereof |
| US6194779B1 (en) | 1989-11-28 | 2001-02-27 | Kabushiki Kaisha Toshiba | Plastic mold type semiconductor device |
| JP2006286688A (en) * | 2005-03-31 | 2006-10-19 | Elpida Memory Inc | Semiconductor device |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5773954A (en) * | 1980-10-25 | 1982-05-08 | Toshiba Corp | Integrated circuit |
| JPS58124251A (en) * | 1982-01-20 | 1983-07-23 | Mitsubishi Electric Corp | Resin-sealed type semiconductor device |
| JPS6150355A (en) * | 1984-08-20 | 1986-03-12 | Toshiba Corp | Semiconductor device |
| JPS61241959A (en) * | 1985-04-18 | 1986-10-28 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | Semiconductor module |
| JPS6216022A (en) * | 1985-07-12 | 1987-01-24 | 株式会社東芝 | Semiconductor type current compensator |
| JPS62296528A (en) * | 1986-06-17 | 1987-12-23 | Matsushita Electronics Corp | Resin-sealed semiconductor device |
-
1987
- 1987-06-30 JP JP62161333A patent/JPH0777226B2/en not_active Expired - Fee Related
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5773954A (en) * | 1980-10-25 | 1982-05-08 | Toshiba Corp | Integrated circuit |
| JPS58124251A (en) * | 1982-01-20 | 1983-07-23 | Mitsubishi Electric Corp | Resin-sealed type semiconductor device |
| JPS6150355A (en) * | 1984-08-20 | 1986-03-12 | Toshiba Corp | Semiconductor device |
| JPS61241959A (en) * | 1985-04-18 | 1986-10-28 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | Semiconductor module |
| JPS6216022A (en) * | 1985-07-12 | 1987-01-24 | 株式会社東芝 | Semiconductor type current compensator |
| JPS62296528A (en) * | 1986-06-17 | 1987-12-23 | Matsushita Electronics Corp | Resin-sealed semiconductor device |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6194779B1 (en) | 1989-11-28 | 2001-02-27 | Kabushiki Kaisha Toshiba | Plastic mold type semiconductor device |
| EP0433695A3 (en) * | 1989-12-22 | 1991-10-02 | Texas Instruments Incorporated | Integrated circuit device and method to prevent cracking during surface mount |
| JPH08241937A (en) * | 1996-03-21 | 1996-09-17 | Hitachi Ltd | Semiconductor device |
| JPH08255854A (en) * | 1996-03-21 | 1996-10-01 | Hitachi Ltd | Semiconductor device and manufacturing method thereof |
| JP2006286688A (en) * | 2005-03-31 | 2006-10-19 | Elpida Memory Inc | Semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0777226B2 (en) | 1995-08-16 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |