JPS6476493A - Semiconductor memory device - Google Patents

Semiconductor memory device

Info

Publication number
JPS6476493A
JPS6476493A JP62234314A JP23431487A JPS6476493A JP S6476493 A JPS6476493 A JP S6476493A JP 62234314 A JP62234314 A JP 62234314A JP 23431487 A JP23431487 A JP 23431487A JP S6476493 A JPS6476493 A JP S6476493A
Authority
JP
Japan
Prior art keywords
current
line
constant current
base
current source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62234314A
Other languages
Japanese (ja)
Inventor
Masao Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62234314A priority Critical patent/JPS6476493A/en
Publication of JPS6476493A publication Critical patent/JPS6476493A/en
Pending legal-status Critical Current

Links

Landscapes

  • Static Random-Access Memory (AREA)

Abstract

PURPOSE:To stabilize a memory cell and to cause a reading speed to be high without almost increasing energy consumption by causing a constant current source to be high current only when a switching is executed from the selection of a line to non-selection and causing the rising of the line to be a high speed. CONSTITUTION:The current of a constant current source IBB for base driving is switched by a line driving signal and an inverter circuit is driven. When the base of this inverter circuit is driven from a high electric potential to a low electric potential, a transistor is temporarily turned off by the time constant of capacity connected to an emitter and the constant current source and the base current of a constant current circuit, which is composed of transistors Qw12-Qwm2 and resistances R12-Rm2, is switched to the high current at a high speed only at the switching time of the line. Thus, the high current is flown only when it is needed and without almost increasing the energy consumption, the memory cell is stabilized and the high reading speed is realized.
JP62234314A 1987-09-17 1987-09-17 Semiconductor memory device Pending JPS6476493A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62234314A JPS6476493A (en) 1987-09-17 1987-09-17 Semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62234314A JPS6476493A (en) 1987-09-17 1987-09-17 Semiconductor memory device

Publications (1)

Publication Number Publication Date
JPS6476493A true JPS6476493A (en) 1989-03-22

Family

ID=16969065

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62234314A Pending JPS6476493A (en) 1987-09-17 1987-09-17 Semiconductor memory device

Country Status (1)

Country Link
JP (1) JPS6476493A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5715285A (en) * 1980-07-03 1982-01-26 Nec Corp Semiconductor storage device
JPS5856283A (en) * 1981-09-29 1983-04-02 Fujitsu Ltd Word line discharging circuit of semiconductor storage device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5715285A (en) * 1980-07-03 1982-01-26 Nec Corp Semiconductor storage device
JPS5856283A (en) * 1981-09-29 1983-04-02 Fujitsu Ltd Word line discharging circuit of semiconductor storage device

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