JPS647675U - - Google Patents
Info
- Publication number
- JPS647675U JPS647675U JP10224887U JP10224887U JPS647675U JP S647675 U JPS647675 U JP S647675U JP 10224887 U JP10224887 U JP 10224887U JP 10224887 U JP10224887 U JP 10224887U JP S647675 U JPS647675 U JP S647675U
- Authority
- JP
- Japan
- Prior art keywords
- arm pieces
- fence
- locking piece
- piece
- integrally
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000037431 insertion Effects 0.000 claims description 3
- 238000003780 insertion Methods 0.000 claims description 3
- 238000009434 installation Methods 0.000 description 1
Landscapes
- Fencing (AREA)
Description
図面は本考案の実施例を示すもので、第１図は
その斜視図、第２図はフエンス取付状態を示す簡
略正面図、第３図はその一部の斜視図、第４図は
その縦断側面図、第５図及び第６図は取付時にお
ける操作を説明するための簡略平面図、第７図は
フエンスの別な構造を示す断面図である。
１，１……アーム片、２……基板片、３……フ
ツク体、４……差込係止片、７……横枠材、８…
…フエンス、９……係止片、１０……挿通孔。
The drawings show an embodiment of the present invention: Fig. 1 is a perspective view thereof, Fig. 2 is a simplified front view showing the fence installed state, Fig. 3 is a perspective view of a part thereof, and Fig. 4 is a longitudinal section thereof. A side view, FIGS. 5 and 6 are simplified plan views for explaining operations during installation, and FIG. 7 is a sectional view showing another structure of the fence. 1, 1... Arm piece, 2... Board piece, 3... Hook body, 4... Insertion locking piece, 7... Horizontal frame material, 8...
...Fence, 9...Locking piece, 10...Insertion hole.
Claims (1)
，１に、互いに接離する方向に弾撥力を付与する
と共に、これらのアーム片１，１の先端に下方に
向かつて屈曲したフツク体３，３を一体に設け、
さらにこれらのアーム片１，１の基端を一体に連
設させた基板片２に、フエンス８に設けた係止片
９に係合させる差込係止片４を下方に向かつて突
設してなるフエンス取付具。 A pair of left and right arm pieces 1 formed into a V-shape in plane
, 1 are given elastic force in the direction of approaching and separating from each other, and hook bodies 3, 3 bent downward are integrally provided at the tips of these arm pieces 1, 1,
Furthermore, an insertion locking piece 4 that engages with a locking piece 9 provided on the fence 8 is provided projecting downward on a base plate piece 2 in which the base ends of these arm pieces 1 and 1 are integrally connected. Tenaru fence mounting bracket.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10224887U JPS647675U (en) | 1987-07-02 | 1987-07-02 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10224887U JPS647675U (en) | 1987-07-02 | 1987-07-02 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS647675U true JPS647675U (en) | 1989-01-17 |
Family
ID=31331984
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10224887U Pending JPS647675U (en) | 1987-07-02 | 1987-07-02 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS647675U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7148559B2 (en) * | 2003-06-20 | 2006-12-12 | International Business Machines Corporation | Substrate engineering for optimum CMOS device performance |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS434381Y1 (en) * | 1964-08-07 | 1968-02-24 | ||
| JPS6127386U (en) * | 1984-07-24 | 1986-02-18 | 東芝ライテック株式会社 | Wiring base mounting device |
-
1987
- 1987-07-02 JP JP10224887U patent/JPS647675U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS434381Y1 (en) * | 1964-08-07 | 1968-02-24 | ||
| JPS6127386U (en) * | 1984-07-24 | 1986-02-18 | 東芝ライテック株式会社 | Wiring base mounting device |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7148559B2 (en) * | 2003-06-20 | 2006-12-12 | International Business Machines Corporation | Substrate engineering for optimum CMOS device performance |
| US7482216B2 (en) | 2003-06-20 | 2009-01-27 | International Business Machines Corporation | Substrate engineering for optimum CMOS device performance |
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