JPS6476769A - High power semiconductor device with nonvolatile memory - Google Patents

High power semiconductor device with nonvolatile memory

Info

Publication number
JPS6476769A
JPS6476769A JP62232115A JP23211587A JPS6476769A JP S6476769 A JPS6476769 A JP S6476769A JP 62232115 A JP62232115 A JP 62232115A JP 23211587 A JP23211587 A JP 23211587A JP S6476769 A JPS6476769 A JP S6476769A
Authority
JP
Japan
Prior art keywords
terminal
nonvolatile memory
bias circuit
gate
high power
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62232115A
Other languages
Japanese (ja)
Other versions
JP2654384B2 (en
Inventor
Isao Yoshida
Takeaki Okabe
Minoru Nagata
Shigeo Otaka
Takaaki Hagiwara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP62232115A priority Critical patent/JP2654384B2/en
Publication of JPS6476769A publication Critical patent/JPS6476769A/en
Application granted granted Critical
Publication of JP2654384B2 publication Critical patent/JP2654384B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Landscapes

  • Non-Volatile Memory (AREA)

Abstract

PURPOSE:To unnecessitate a gate bias circuit even in the ON state, and realize the saving of power and the preventing of an accident of service interruption, by using a device having a nonvolatile memory function, in the main body of a power MOSFET or its bias circuit. CONSTITUTION:When the source 3 of a high power MOSFET Q1 acting as a main switch is grounded, a drain 4 is connected to a load terminal, and a gate 5 is connected to the floating gate terminal 6 of a MOSFET Q2 having function of electrically rewritable nonvolatile memory. A second gate terminal 8 of Q2 is grounded, a drain terminal 7 is connected to a bias circuit. By electric charge stored in the floating gate terminal 6 of Q2, the gate terminal 5 of Q1 is biased, and Q1 turns ON. Once Q1 turns ON, the ON state of Q1 is maintained, even if the bias circuit connected to the terminal 7 of Q2 is eliminated, if only charge stored in the terminal 6 is kept. On the contrary, in the case of making Q1 turn ON, the terminal 7 is reverse-biased.
JP62232115A 1987-09-18 1987-09-18 High power semiconductor device with nonvolatile memory Expired - Fee Related JP2654384B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62232115A JP2654384B2 (en) 1987-09-18 1987-09-18 High power semiconductor device with nonvolatile memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62232115A JP2654384B2 (en) 1987-09-18 1987-09-18 High power semiconductor device with nonvolatile memory

Publications (2)

Publication Number Publication Date
JPS6476769A true JPS6476769A (en) 1989-03-22
JP2654384B2 JP2654384B2 (en) 1997-09-17

Family

ID=16934242

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62232115A Expired - Fee Related JP2654384B2 (en) 1987-09-18 1987-09-18 High power semiconductor device with nonvolatile memory

Country Status (1)

Country Link
JP (1) JP2654384B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005536048A (en) * 2002-08-13 2005-11-24 ジェネラル・セミコンダクター・インコーポレーテッド DMOS device with programmable threshold voltage
JP2008141195A (en) * 2006-11-30 2008-06-19 Dongbu Hitek Co Ltd Semiconductor device and manufacturing method thereof
JP2013033993A (en) * 2006-07-26 2013-02-14 Koninkl Philips Electronics Nv Device and method for deactivating electrical element when malfunctioning

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005536048A (en) * 2002-08-13 2005-11-24 ジェネラル・セミコンダクター・インコーポレーテッド DMOS device with programmable threshold voltage
JP2013033993A (en) * 2006-07-26 2013-02-14 Koninkl Philips Electronics Nv Device and method for deactivating electrical element when malfunctioning
JP2008141195A (en) * 2006-11-30 2008-06-19 Dongbu Hitek Co Ltd Semiconductor device and manufacturing method thereof

Also Published As

Publication number Publication date
JP2654384B2 (en) 1997-09-17

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees