JPS6478027A - A/d converting circuit - Google Patents

A/d converting circuit

Info

Publication number
JPS6478027A
JPS6478027A JP23541787A JP23541787A JPS6478027A JP S6478027 A JPS6478027 A JP S6478027A JP 23541787 A JP23541787 A JP 23541787A JP 23541787 A JP23541787 A JP 23541787A JP S6478027 A JPS6478027 A JP S6478027A
Authority
JP
Japan
Prior art keywords
order bit
voltage
input voltage
integration
converter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23541787A
Other languages
Japanese (ja)
Inventor
Kazuhisa Ishiguro
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP23541787A priority Critical patent/JPS6478027A/en
Publication of JPS6478027A publication Critical patent/JPS6478027A/en
Pending legal-status Critical Current

Links

Landscapes

  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE:To reduce the maximum number of clocks required for digital conversion by finding only a low-order bit by integration. CONSTITUTION:The titled circuit is constituted of a parallel comparison type A/D converter 15 to decide the high-order bit of the digital conversion quantity of an input voltage Vx, a circuit 16 to generate a high-order bit voltage corresponding to the size of the input voltage Vx, and an integration type A/D converter 17 to impress the high-order bit as the bias voltage of an integrator and to decide the low-order bit. The integration type A/D converter 17 inputs the high-order bit voltage corresponding to the size of the input voltage as bias when performing the integration of the input voltage Vx. In such a way, since it is possible to shorten a period to integrate a reference voltage and to reduce the maximum number of clocks required for the digital conversion, conversion speed can be accelarated.
JP23541787A 1987-09-18 1987-09-18 A/d converting circuit Pending JPS6478027A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23541787A JPS6478027A (en) 1987-09-18 1987-09-18 A/d converting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23541787A JPS6478027A (en) 1987-09-18 1987-09-18 A/d converting circuit

Publications (1)

Publication Number Publication Date
JPS6478027A true JPS6478027A (en) 1989-03-23

Family

ID=16985789

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23541787A Pending JPS6478027A (en) 1987-09-18 1987-09-18 A/d converting circuit

Country Status (1)

Country Link
JP (1) JPS6478027A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017029984A1 (en) * 2015-08-19 2017-02-23 国立大学法人 鹿児島大学 Analog to digital converter

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017029984A1 (en) * 2015-08-19 2017-02-23 国立大学法人 鹿児島大学 Analog to digital converter
JPWO2017029984A1 (en) * 2015-08-19 2018-05-31 国立大学法人 鹿児島大学 Analog to digital converter
US10263634B2 (en) 2015-08-19 2019-04-16 Kagoshima University Analog-digital converter

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