JPS6482151A - Memory control system for microprocessor system - Google Patents

Memory control system for microprocessor system

Info

Publication number
JPS6482151A
JPS6482151A JP62240050A JP24005087A JPS6482151A JP S6482151 A JPS6482151 A JP S6482151A JP 62240050 A JP62240050 A JP 62240050A JP 24005087 A JP24005087 A JP 24005087A JP S6482151 A JPS6482151 A JP S6482151A
Authority
JP
Japan
Prior art keywords
space
mmu
control program
virtual
virtual address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62240050A
Other languages
Japanese (ja)
Inventor
Hiroaki Hara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62240050A priority Critical patent/JPS6482151A/en
Publication of JPS6482151A publication Critical patent/JPS6482151A/en
Pending legal-status Critical Current

Links

Landscapes

  • Memory System (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

PURPOSE:To freely produce a virtual space regardless of the arrangement of a physical memory by saving once and MMU (memory control unit) control program into another virtual address. CONSTITUTION:A conversion table is produced for a virtual space 2 where an MMU control program 4 is mapped over both MMU control programs 5 and 6. Then a physical memory space 1 is switched to the space 2. A jump is given to a virtual address of an MMU control program 6 and an MMU control program 7 is mapped. Then a jump is given to a virtual address of the program 7. A conversion table is produced for an original virtual space 3 for switch to this space 3. Thus the virtual address receives no influence from the arrangement of a physical memory and a free virtual space can be obtained.
JP62240050A 1987-09-24 1987-09-24 Memory control system for microprocessor system Pending JPS6482151A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62240050A JPS6482151A (en) 1987-09-24 1987-09-24 Memory control system for microprocessor system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62240050A JPS6482151A (en) 1987-09-24 1987-09-24 Memory control system for microprocessor system

Publications (1)

Publication Number Publication Date
JPS6482151A true JPS6482151A (en) 1989-03-28

Family

ID=17053731

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62240050A Pending JPS6482151A (en) 1987-09-24 1987-09-24 Memory control system for microprocessor system

Country Status (1)

Country Link
JP (1) JPS6482151A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5088800A (en) * 1989-10-31 1992-02-18 Robert Bosch Gmbh Vehicle brake system having anti-skid apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5088800A (en) * 1989-10-31 1992-02-18 Robert Bosch Gmbh Vehicle brake system having anti-skid apparatus

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