JPS648871B2 - - Google Patents

Description

[Detailed Description of the Invention] (A) Technical Field of the Invention The present invention relates to a graphic pattern extraction processing method, in particular,
For example, in a graphic processing system where an input drawing, such as a logic circuit diagram drawn by hand along a lattice axis, is read and input into a data processing device, graphic pattern extraction is used to extract predetermined logic symbols, etc. from the logic circuit diagram. This is related to the processing method.

(B) Technical background and problems For example, a logic circuit diagram is drawn by hand on a graph paper with lattice axes drawn along the lattice axes as much as possible, and the logic symbols, symbols, and wiring patterns of the handwritten logic circuit diagram are drawn. It is being considered and researched to automatically read and determine information such as information, and input it into a data processing device.

In such a graphic processing system, due to handwriting, lines may not be placed correctly on the grid axes, and not only logical symbols and wiring patterns but also real characters such as AND may be written as necessary. Graphical processing must be complicated because it may be written.

The present inventors have developed Japanese Patent Application No. 101842/1984 and Japanese Patent Application No.
Filed patent application No. 101843. In these patent applications, an image to be processed is divided into small area units centered at intersections of grid axes (referred to as lattice points), and a pattern within each segmented small area unit is associated with the lattice points. As grid point label code
It is expressed as a 16-bit code, and the code is used to perform subsequent processing.

That is, as shown in FIG. 1, logic symbols 2, etc. are handwritten on a graph paper with grid axis 1 (the grid spacing shown is enlarged), and these are automatically read and data processed. input into the device. In this reading, the grid point 3 is divided into small area units 4 centered on the grid point 3, and the pattern within the small area unit 4 is divided into grid point labels and codes for each small area unit 4 as shown in FIG. 5 and is expressed in 16 bits, and subsequent processing will be performed using this code.

The detailed explanation of how to extract the lattice point label code 5 shown in FIG. 2 is given to the above-mentioned patent application. 4 bits are given.
The four-way code expresses the following conditions.
That is, when it is considered that there is a substantially downward line segment within one small area unit 4, D=
1 is given, L=1 is given when it is assumed that a line segment substantially to the left exists, and U= is given when it is considered that a line segment substantially upwards exists.
1 is given, and R=1 is given when it is considered that a substantially rightward line segment exists. In the example shown in Figure 1, "1001" is given as "DLUR" to the small area unit 4-1, and "1011" is given as "DLUR" to the small area unit 4-2.
is given.

(C) Object and structure of the invention The present invention focuses on the four-way code on the lattice point label code extracted as described above, and generates a predetermined pattern such as the logical symbol symbol 2 shown in FIG. The purpose is to extract the four-way code by comparing it with the contents of the pattern dictionary memory, and to enable correct extraction even if the original four-way code changes somewhat in the process of generating the four-way code. Therefore, the graphic pattern extraction processing method of the present invention includes an image input means, and an input from the image input means that divides the image existence area into two.
A graphic processing system comprising: an image data holding means that divides into dimensional small area units and holds image data representing an image within the small area unit as a lattice point label code including a direction code, For each of the plurality of standard patterns corresponding to a predetermined pattern in the above-mentioned image, the image within each small area unit constituting the standard pattern is at least a first image that substantially matches the image of the standard pattern. , a non-matching but acceptable second image, and
A pattern dictionary memory that expresses the third image that does not match and is not acceptable using a direction code, and a small area in which the direction code in the grid point label code and the direction code stored in the pattern dictionary memory are stored. A similarity extraction circuit that calculates similarity by comparing units is provided, and based on the result of the similarity calculation, it is determined whether the graphic pattern to be extracted substantially matches the standard pattern or whether it does not match but is acceptable. , does not match and is not acceptable. This will be explained below with reference to the drawings.

(D) Embodiment of the invention FIGS. 3 to 6 are explanatory diagrams for explaining the problems of the present invention. FIGS. 7A and B are explanatory diagrams for explaining an embodiment of the pattern dictionary memory used in the present invention. FIG. 8 shows the configuration of an embodiment of the present invention.

FIG. 3A shows a standard pattern 6 corresponding to the logic symbol 2 shown in FIG. The result will be as shown in FIG. 3B. In the case of the present invention, a direction code as shown in FIG. 3B is stored in a pattern dictionary memory for each standard pattern, and the direction code is compared with the direction code for each small area unit obtained from the input image. For example, a pattern opposite to the standard pattern 6 is extracted from the image. That is, in FIG. 4, the direction code group 7 corresponding to the standard pattern stored in the pattern dictionary,
With respect to the direction code group 8 obtained from the input image, the direction codes are compared for each small area unit 4.

However, as shown in the above-mentioned patent application documents, the standard pattern shown in Figure 3A is complicated because the above-mentioned four-way code is generated using complicated processing and is a handwritten figure. For example, if the pattern from the input image corresponding to
It is easy to have the direction code group 8 as shown in FIG. 5A, that is, as conceptually shown in FIG. In addition, in the direction code group 8, the coordinates (, A)
The direction code (DLUR) for each small area is (1010), which is different from that shown in FIG. 3B. It is desirable to extract patterns correctly even with such deformation. However, for example, as in the direction code group 8 shown in FIG.
It is desired that blank spaces within the small area unit of coordinates (,A) be recognized in a different form from that shown in FIG. 5B.

For this purpose, in the case of the present invention, the following contents of the pattern dictionary are prepared.
FIG. 7A shows the small area (,A) shown in FIG. 3B,
The dictionary contents in the range corresponding to (,A),...(,A) are shown. That is, for the small area unit of coordinates (, A), if it is a blank "・" (0000), the weight is set to "1", if it is a downward direction "〓" (1000), the weight is set to "0", and if it is other than that, the weight is set to "1". Weight “-1”
Prepare the dictionary contents as follows. Similarly, for the small area unit of coordinate (A), move downward/rightward "〓"
Prepare the dictionary contents so that if it is (1001), the weight is ``1'', if it is ``〓'' (up/down/rightward), it is the weight ``0'', and if it is otherwise, the weight is ``-1''. do.

Then, in the above verification, the weights as described above are multiplied, the cumulative sum value is obtained, and the sum value is compared with the threshold value. In fact, in the pattern dictionary memory, "Other"
For example, at coordinates (,A), (i) direction codes (1111), (1110), (1101), (1100),
When (1011), (1010), and (1001) appear, a weight of “-1” is given, (ii) when a direction code (1000) appears, a weight of “0” is given, and (iii) a direction code (0111) is given a weight of “0”. ,
(0110), (0101), (0100), (0011), (0010),
When (0001) appears, give weight “-1”, (iv)
The dictionary contents are prepared so that when the direction code (0000) appears, a weight of "1" is given.

FIG. 8 shows the configuration of an embodiment of the present invention.

In the figure, reference numeral 11 denotes an image input device that reads handwritten input figures and outputs them as image data, such as a facsimile device. 12 is an image memory, and the image input device 1
It holds the image data supplied from. Reference numeral 13 denotes a verification circuit which performs the first to third verification processes within the above-mentioned small area unit using a 1.times.n mesh verification window.
14 is a reference point detection circuit which detects a reference point on an input data sheet, calculates rotational distortion etc. occurring in image data, and corrects distortion of data read out from image memory 12. It is. Reference numeral 15 is a grid point table that holds addresses of grid points of input image data.

16 is a lattice conversion circuit (horizontal), and 18
is a lattice conversion circuit (vertical) that extracts and processes image data near lattice points. 17
is a grid point label code generation circuit (horizontal), and 19 is a grid point label code generation circuit (vertical), which generates information related to positional deviation in the label code based on the output from the circuit 16 or 18. It performs processing to generate bits.

20 is an address control section, which controls the image memory 1.
This is to perform control for extracting the necessary image data from 2. Reference numeral 21 is a control unit that reads data from handwritten figures and performs various controls. 22 is a verification window setting circuit, which is a circuit for setting various verification windows. 23 is
This is an LBL table that holds initial grid point label codes LBL. 24 is
LB1 table, first validation label code
This is a table that holds LB1. 25 is an LB2 table that holds the second verification label code LB2.

26 is the SX1/SY1 table, which contains the first verification deviation information SX1 and SX1 obtained as a result of the first verification process.
This is the table that holds SY1. 27 is SX2・
The SY2 table is a table that holds second verification deviation information SX2 and SY2 obtained as a result of the second verification process.

Reference numeral 28 is an address conversion circuit which converts the address shifted by the number of bits necessary to normalize the lattice point address transmitted from the lattice point table 15 using the above-mentioned verification deviation information SX1, SY1, SX2, SX2, etc. This is what is output. 29 is an LB3 generation circuit that generates the third verification label code LB3, and 30 is an LB3 table that generates LB3.
This table holds the code LB3 obtained by the generation circuit 29.

31 is a lattice point label code determination circuit, which generates the lattice point label code 5 as shown in FIG. 2, and 32 is a LABEL table which holds the above-mentioned lattice point label code 5. It's a table.

33 is a pair processing circuit, and in the grid point label code 5 shown in FIG.
It performs correction processing for small area units in which . Reference numeral 34 is a line pattern breakage correction circuit, which corrects when a clear breakage portion is found in a linear pattern. 35 is a character removal () circuit, and the first
Information corresponding to characters such as AND drawn in the input figure as shown in the figure is removed to facilitate the extraction of logical symbols and the like. 3
Reference numeral 6 indicates a deviation correction circuit (), and numeral 37 indicates an ambiguity correction circuit (). Note that the circuits 33 to 37 are based on the grid point label code 5 obtained first.
It can be considered that the lattice point label code 5 is obtained by modifying the lattice point label code 5 in a more desirable form.

The configurations and operations of the reference numerals 11 to 37 are disclosed in the above-mentioned patent application, and detailed explanations will be omitted.
It can be considered that grid point label codes 5 as shown in FIG. 2 are extracted for each small region. In the present invention, the "4-way code" in the lattice point label code obtained as described above is used to create a standard code, such as a logical symbol, as explained with reference to FIGS. 3 to 7. Extract a pattern that corresponds to the pattern. for that,
As shown in FIG. 8, the pattern dictionary memory 3
8, a similarity extraction circuit 39, and a symbol recognition table 40.

As explained with reference to FIG. 7, the pattern dictionary memory 38 stores one
For each "direction code" within a small area unit, (i) the direction code of the first image that substantially matches the image of the standard pattern, which is given a weight of "1"; (ii) the direction code of the first image that is given a weight of "0"; (iii) the orientation code of the second image corresponding to the non-matching but acceptable deformation, giving a weight of '-1'; The orientation code of the image is stored in the form of .

The similarity extraction circuit 39 compares the "direction code" in the code 5 read from the grid point label code table 32 with the "direction code" in the dictionary memory 38 to calculate the similarity. That is, the coordinates (A), (A), (A), (A), (A) shown in FIG. 3B are currently stored in the pattern dictionary memory 38.
,
Assuming that the contents as shown in Figure 7 are stored in relation to (A) and (), and the direction code group 8 as shown in Figure 5B is given, the degree of similarity is 1+1+0+1+1+1+1=6. Ru. Also, the direction code group 8 as shown in FIG.
Given, the similarity is 1+1+(-1)+1+1+1+1=5. Of course, the standard pattern 6 shown in FIG.
As for whether there is a pattern corresponding to the coordinates (A), ..., (A), (B), ..., (
The determination is made after the above-mentioned verification is performed for all of C).

The symbol recognition table 40 holds the label of the standard pattern on the table together with the coordinate position when a pattern corresponding to the predetermined standard pattern exists based on the extracted similarity. Of course, it is optional to decide on the pattern not only based on the degree of similarity but also on the basis of other judgment information.

According to the present invention, as described above, it is possible to extract logical symbols, etc., but by selecting the reading mode for each small area in the pattern dictionary memory 38, only the logical symbol 2 shown in FIG. Instead, it can be commonly used as a dictionary for symbols whose outputs are upward, leftward, downward, etc. That is, for example, by exchanging coordinates (A) and (C) around coordinate (B) shown in FIG. 3B,
By reading the contents of the pattern dictionary memory 38, it can be used to extract symbols whose output is directed toward the left.

(E) Effects of the Invention As explained above, according to the present invention, deformation of the figure can be absorbed when extracting the figure in each small area unit as a grid point label code, and it can be compared with the pattern dictionary memory. Care is taken to absorb deformations even if they occur, while eliminating deformations that should be eliminated. For this reason, it becomes possible to correctly interpret, for example, a handwritten logic circuit diagram and input it into a data processing device.

[Brief explanation of the drawing]

FIG. 1 is an explanatory diagram explaining the concept of processing a patent application, which is the premise of the present invention, FIG. 2 is an example of a grid point label code used in the present invention, and FIGS. 3 to 6 are diagrams of the present invention. FIGS. 7A and 7B are explanatory diagrams illustrating a pattern dictionary memory according to an embodiment of the present invention, and FIG. 8 shows the configuration of an embodiment of the present invention. In the figure, 2 is a logical symbol, 3 is a lattice point, and 4 is a
is a small area unit, 5 is a grid point label code, 6 is a standard pattern, 8 is a direction code group, 11 is an image input device, 12 is an image memory, 32 is a grid point label code table, 38 is a pattern dictionary memory , 39 represents a similarity extraction circuit, and 40 represents a symbol recognition table.

Claims (1)

[Claims] 1. An image input means; and 2.
A graphic processing system comprising: an image data holding means that divides into dimensional small area units and holds image data representing an image within the small area unit as a grid point label code including a direction code, For each of the plurality of standard patterns corresponding to a predetermined pattern in the above-mentioned image, the image within each small area unit constituting the standard pattern is at least a first image that substantially matches the image of the standard pattern. , a non-matching but acceptable second image, and
A pattern dictionary memory that expresses the third image that does not match and is not acceptable using a direction code, and the direction code in the grid point label code and the direction code stored in the pattern dictionary memory in small area units. and a similarity extraction circuit that calculates the degree of similarity by comparing with the standard pattern, and based on the result of the calculation of the degree of similarity, determines whether the graphic pattern to be extracted substantially matches the standard pattern, or whether it does not match but is acceptable. A graphic pattern extraction processing method characterized by determining whether the pattern does not match or is not acceptable.