JPS6489446A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS6489446A
JPS6489446A JP24424587A JP24424587A JPS6489446A JP S6489446 A JPS6489446 A JP S6489446A JP 24424587 A JP24424587 A JP 24424587A JP 24424587 A JP24424587 A JP 24424587A JP S6489446 A JPS6489446 A JP S6489446A
Authority
JP
Japan
Prior art keywords
ions
wiring
interface
layers
insulating film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24424587A
Other languages
Japanese (ja)
Inventor
Yasushi Nakajima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP24424587A priority Critical patent/JPS6489446A/en
Publication of JPS6489446A publication Critical patent/JPS6489446A/en
Pending legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To prevent shortcomings such as junction breakdown, occurrence of leaking current and the complication of the manufacturing process, by forming metal silicide including the hole part in a wiring part, setting the range of ions at the interface between the silicide and an insulating film, implanting ions, and forming physical mixed layers of both layers at the interface between a wiring material and the insulating film. CONSTITUTION:A transistor and the like are formed through ordinary steps. A wiring hole 4 is formed in an intermediate insulating film 3 comprising PSG on the transistor and the like. Metal silicide 5 is further evaporated. The range of ions is set at an interface between the silicide 5 and the intermediate film 3 for a diffused layer 6 at a wiring hole part. Ions are implanted 7. Mixed layers 8 of both layers are grown at the interface. The ions are implanted into the diffused layer 6, too. Annealing is performed in order to recover the crystal deffect caused by the ion implantation. Thereafter, an Al-Si layer comprising lower wiring material is sputtered, and wiring is performed. In the obtained wiring, the metal silicide film is not released even if adhesive tape is stuck and removed. Therefore adhesion is improved. As the ions for said ion implantation, Si and Ge among B, Si, P, Ga, Ge and As or the ions indicating the same conductivity as that of the diffused layer are used.
JP24424587A 1987-09-30 1987-09-30 Manufacture of semiconductor device Pending JPS6489446A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24424587A JPS6489446A (en) 1987-09-30 1987-09-30 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24424587A JPS6489446A (en) 1987-09-30 1987-09-30 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS6489446A true JPS6489446A (en) 1989-04-03

Family

ID=17115889

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24424587A Pending JPS6489446A (en) 1987-09-30 1987-09-30 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6489446A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0496325A (en) * 1990-08-13 1992-03-27 Oki Electric Ind Co Ltd Impurity diffusion layer
JPH056995A (en) * 1991-06-27 1993-01-14 Nec Corp High melting point metal silicide film and its formation method
US5210043A (en) * 1989-09-26 1993-05-11 Seiko Instruments Inc. Process for producing semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5210043A (en) * 1989-09-26 1993-05-11 Seiko Instruments Inc. Process for producing semiconductor device
JPH0496325A (en) * 1990-08-13 1992-03-27 Oki Electric Ind Co Ltd Impurity diffusion layer
JPH056995A (en) * 1991-06-27 1993-01-14 Nec Corp High melting point metal silicide film and its formation method

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