JPS6489611A - Gaas semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To prevent self-oscillation by connecting a bias generation connecting point due to the resistance division of a GaAs semiconductor integrated circuit and a supply voltage terminal and connecting a gate with an external input terminal. CONSTITUTION:When nothing is connected to the external input terminal and a power source voltage is impressed, a bypass FET4 goes to be a low resistance and a bias voltage to be given to the gate of a current source FET3 goes to be a higher value than the bias voltage to be generated only by high resistances 5, 6 and 7. At such a time, by suitably selecting the gate width of the chip of the bias FET4, the bias point of the current source FET3 is dislocated and the self-oscillation is suppressed. When a signal source is connected to an external input terminal 10, the bypass FET4 goes to a condition to be cut-off since a gate electric potential is grounded and a normal voltage is given for the gate bias of the current source FET3 by the resistance division due to the high resistances 5, 6 and 7. Then, the circuit is normally operated.