KR100848112B1 - Printed circuit board and liquid crystal display device using this board - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed circuit board for a liquid crystal display device having a timing controller and a pad for a driver IC and a method of generating display data suitable for the substrate.

The printed circuit board of the present invention comprises: a timing controller for receiving display data from a graphic source and converting the display data through bit swap for each of the driver ICs; A plurality of pads each having a plurality of conductive lines corresponding to the number of bits of the display data, the plurality of pads receiving the converted display data from the timing controller and providing the converted data to the driver ICs; And a wiring pattern connecting the conductive lines of each pad to each other between two adjacent pads of the plurality of pads, wherein the timing controller is connected to supply display data to some of the pads. The wiring pattern between the two pads is formed such that conductive lines symmetrical with respect to the center of two adjacent pads are connected to each other.

The printed circuit board of the present invention is characterized in that the data wiring between the pads is reduced in half and the length thereof is significantly shorter than in the prior art.

LCD, Printed Circuit Board, Driver IC, Display Data, Swap

Description

A printed circuit board and a liquid crystal display device using the board {A PRINTED CIRCUIT BOARD AND A LIQUID CRYSTAL DISPLAY APPARATUS USING THE BOARD}

1 is a view showing a format of display data in a conventional liquid crystal display device.

FIG. 2 is a diagram showing a printed circuit board having data wirings designed for the format of the display data shown in FIG.

3 is a view showing a configuration of a liquid crystal panel assembly to which the present invention is applied in a liquid crystal display device.

4 is a diagram showing data wiring of a printed circuit board according to a first embodiment of the present invention.

FIG. 5 is a view illustrating a display data transfer process in the printed circuit board of FIG. 4.

Fig. 6 is a diagram showing the format of display data provided to a printed circuit board having the data wiring shown in Fig. 4;

7 is a diagram showing data wiring of a printed circuit board according to a second embodiment of the present invention.

FIG. 8 is a diagram showing a format of display data provided to a printed circuit board having the data wiring shown in FIG.                 

(Explanation of symbols for the main parts of the drawing)

40: printed circuit board 41: timing control unit

50: liquid crystal panel 60: tape

61: source driver IC

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed circuit board (PCB) for a liquid crystal display device and a method of generating display data suitable for the substrate, and more particularly, to a printed circuit board having a timing controller and a pad for a driver IC A method for generating display data suitable for a substrate.

In recent years, as a liquid crystal display device is mainly used as a computer monitor, the screen of a liquid crystal display device is enlarged. For example, liquid crystal displays having a screen size of 17 inches and a resolution of super extended graphics array (SXGA) (1280 X 1024) are widely used.

In a liquid crystal display, a display is implemented by controlling the transmittance of a liquid crystal material injected between two layers of electrodes by a voltage difference applied to the two electrodes.

The liquid crystal display device includes a liquid crystal panel assembly, a backlight assembly, a chassis and a case. More specifically, the liquid crystal panel assembly includes a liquid crystal panel and a printed circuit board. It consists of. The liquid crystal panel is composed of a plurality of pixels having a matrix structure to perform a display. The printed circuit board includes a timing controller for generating a signal for driving the liquid crystal panel, and an output signal of the timing controller. A plurality of pads delivered to the driver IC and a voltage generator circuit for generating various voltages for driving the liquid crystal panel are mounted. The liquid crystal panel and the printed circuit board are connected to each other by a tape having a wiring pattern, and a driver IC is mounted on the tape.

The timing controller generates RGB display data and control signals from an RGB signal provided from a graphic module external to the liquid crystal display, and the pads transfer signals between the timing controller and the driver IC.

Hereinafter, a conventional technology will be described with reference to the accompanying drawings.

1 illustrates a format of RGB display data provided by a timing controller of a conventional liquid crystal display. FIG. 2 shows a printed circuit board having data wirings designed for the format of the display data shown in FIG. 1.

In FIG. 2, the timing controller 2 and the plurality of pads 31, 32, and 33 are mounted on the printed circuit board 1, and the pads 31, 32, and 33 are connected to each other by data wiring. It is. The number of the pads 31, 32, 33 is the same as the number of driver ICs (not shown), and each of the pads 31, 32, 33 is connected to the driver IC, respectively. The printed circuit board 1 has a multilayer structure, and only data wirings between the pads 31, 32, and 33 are shown in FIG. 2. Although not shown in FIG. 2, the wiring of the display data output from the timing controller 2 is connected only to the first pad 31. The signal connection between the timing controller 2 and the driver IC is made through the plurality of pads 31, 32, 33 as described above.

For example, if the resolution is SXGA (1280 X 1024) and the driver IC is 384 channels (128 X 3, because RGB three colors form one basic pixel), 10 driver ICs are used, and 10 The pad is mounted on a printed circuit board. The data format of FIG. 1 is applied to the timing controller of the liquid crystal display device having the structure described above.

Referring to FIG. 1, 8 bits of display data are provided for red (R), green (G), and blue (B: blue), and each bit of display data is one horizontal scan of the liquid crystal panel. 1280 units are provided for a horizontal scanning line. Here, 8 bits for each color indicate one gray level, and three RGB colors are gathered to display one basic pixel.

Next, signal transmission in the printed circuit board 1 will be described.

When display data is supplied from the timing controller 2 to the first driver IC, the first driver IC is activated by the timing controller 2, and the output signal of the timing controller 2 passes through the first pad 31. It is delivered to the first driver IC. When display data is supplied from the timing controller 2 to the third driver IC, the third driver IC is activated by the timing controller 2, and the display data output from the timing controller 2 is the first pad 31. The third pad is transferred to the third driver IC via the second pad 32 and the third pad 33.                         

In a printed circuit board having such a structure, data wirings are formed between pads. In the related art, as shown in FIG. 2, there is a problem in that the wiring pattern formed between the pads is large and the wiring pattern is too long. As the screen of the liquid crystal display device becomes larger and the image quality becomes higher, the number of driver ICs and the number of bits of display data increase further, which adds to electro-magnetic interference (EMI). In addition, in the conventional printed circuit board for liquid crystal display devices, since the wiring pattern is long and complicated, there is a problem that the substrate is large and the number of layers is large.

SUMMARY OF THE INVENTION The present invention has been made under the technical background as described above, and a first object of the present invention is to provide a printed circuit board for a liquid crystal display device with a simplified wiring pattern between pads.

It is a second object of the present invention to provide a display data generation method applicable to a printed circuit board having a simplified wiring pattern.

The present invention for achieving the above object relates to a printed circuit board for a liquid crystal display device in which a liquid crystal panel is driven by a plurality of driver IC,

A timing controller which receives display data from a graphic source and converts the display data through bit swap for each of the driver ICs;

A plurality of pads each having a plurality of conductive lines corresponding to the number of bits of the display data, the plurality of pads receiving the converted display data from the timing controller and providing the converted data to the driver ICs; And

A wiring pattern connecting the conductive lines of each pad to each other between two adjacent pads of the plurality of pads,

The timing controller is connected to supply display data to some of the pads, and a wiring pattern between two adjacent pads is formed such that conductive lines symmetrical with respect to the center of two adjacent pads are connected to each other.

In the above-described configuration of the present invention, in order to simplify the data wiring between the pads of the printed circuit board, the conductive lines of each pad are symmetrically connected to each other with respect to the center between adjacent pads, and the timing controller controls such pads. The display data is generated in accordance with the wiring pattern between them, so that the data wiring between the pads of the printed circuit board is reduced in half and the length thereof is significantly shorter than in the related art.

That is, in the printed circuit board of the present invention, since the bit order of the data wirings between the pads is swapped, display data must be generated such that the bit order is swapped in advance for each data corresponding to one driver IC in the timing controller. The display data is composed of red (R), green (G), and blue (B) of n bits. In the timing control section, the bit swap of the display data is that the i (i is a variable) bit of red (R) is replaced with the (ni-1) th bit of blue (B), and the i th bit of blue (B) is red. It is exchanged with the (ni-1) th bit of (R), and the i th bit of the green G is replaced with the (ni-1) th bit of the green G. The timing controller performs such a bit swap every time the display data is arranged in units of data amount required for one driver IC, so that the display data is correctly transferred to the printed circuit board proposed in the present invention.

The objects, technical configurations, and effects thereof of the present invention described above will become more apparent from the following description of the embodiments.

Hereinafter, with reference to the accompanying drawings will be described in detail a preferred embodiment of the present invention.

First, a liquid crystal panel assembly to which the present invention is applied will be described with reference to FIG. 3.

As shown in FIG. 3, the liquid crystal panel assembly to which the present invention is applied includes a printed circuit board 40 and a liquid crystal panel 50. The printed circuit board 40 includes a timing controller 41 and pads 42 to 47 for driver ICs. Although not shown in FIG. 3, a voltage generating circuit and a peripheral circuit for driving a liquid crystal are mounted. have. The timing controller 41 receives n-bit display data including red (R), green (G), and blue (B) from a graphic source (not shown).

In the present invention, since the resolution of the liquid crystal display device is SXGA (1280 X 1024), and the driver IC is assumed to be 384 channels (128 X 3, three RGB colors constitute one basic pixel), 10 drivers An IC is used and ten pads are mounted on a printed circuit board. On the other hand, the number (numerical value) or the number of elements used throughout the present specification are only examples to aid the understanding of the invention, the specific value does not limit the technical scope of the present invention. In addition, it is apparent to those skilled in the art that the numerical value or the number may be changed according to the design condition of the hardware.

Each of the driver pads 42 to 47 has a plurality of internal conducting lines. For example, when 8 bits of display data are used to display one gray level, one pixel is composed of three colors of red, green, and blue, and each color is grayed out by 8 bits of display data. Since display is made, the pads 42 to 47 for the driver IC have at least 24 (8 × 3) conductive lines. At this time, the conductive lines of the pads 42 to 47 correspond to 8 bits of red, green, and blue, respectively, and the order of arranging each bit is the same in all of the pads 42 to 47. In addition, since the timing controller 41 must transmit various control signals to the driver IC in addition to the display data, a terminal for such a signal is also required. In this specification, only wirings for display data are shown for convenience of description.

The driver IC pads 42 to 47 and the liquid crystal panel 50 are connected to each other by tapes 81 to 86, and each of the tapes 81 to 86 has a wiring pattern. Each of the tapes 81 to 86 is provided with driver ICs 61 to 66, such as a source driver IC, for example. The wiring patterns of the tapes 81 to 86 are formed to be connected to the input terminal and the output terminal of the mounted driver IC, and are externally connected to the data lines of the liquid crystal panel 50 and used for the driver IC. It is also formed to be connected to the inner conductive line of the pad. As a result, signal transmission in the above structure starts at the timing controller 41 and ends at the liquid crystal panel 50 via the pad for the driver IC, the wiring of the tape, and the wiring of the driver IC and the tape. Meanwhile, the printed circuit board 40 has a multilayer structure, and the wiring pattern between the timing controller 40 and the first driver IC pad 42 and the connection patterns between the pads 42 to 47 are different from each other. Located on the floor

Next, a first embodiment of the present invention will be described with reference to FIGS. 4 to 6.

4 illustrates a data line of a printed circuit board according to the first exemplary embodiment of the present invention, FIG. 5 illustrates a process of transferring display data in the printed circuit board of FIG. 4, and FIG. The format of the display data provided to the printed circuit board shown in FIG.

As shown in Fig. 4, in the printed circuit board according to the first embodiment of the present invention, data wiring between the pads for the driver IC is simplified compared with the prior art. More specifically, conventionally, the leftmost inner conductive line of the first pad is connected to the leftmost inner conductive line of the second pad between two adjacent pads, and similarly, the rightmost inner conductive line of the first pad is the most The data line is formed to be connected to the right inner conductive line. However, in the present invention, data wirings are formed such that terminals in symmetrical positions with respect to the center between two adjacent pads are connected to each other. For example, in FIG. 4, the display data bits R7-0 of the first pad 42 are connected to the bits B7-0 of the second pad 43, and the bits (of the first pad 42) G7 to 0 are connected to bits G7 to 0 of the second pad 43, and bits B7 to 0 of the first pad 42 are connected to bits R7 to 0 of the second pad 43. Connected. That is, terminals at symmetrical positions with respect to the center line between the two pads 42 and 43 are connected to each other. If the bit order of the first pad 42 and the second pad 43 is (R7, R6, ..., R1, R0, G7, G6, ..., G1, G0, ..., B7, B6, ..., B1, B0), for example, the R7 bit of the first pad 42 is connected with the B0 bit of the second pad 43, and the G6 bit of the first pad 42 is It is connected to the G1 bit of the second pad 43, and the B3 bit of the first pad 42 is connected to the R4 bit of the second pad 43.

In addition, data lines between the pads are alternately formed above and below the pads. In other words, the data wiring between the first pad and the second pad is formed above the two pads, and the data wiring between the second pad and the third pad is formed below the two pads. It can be seen that the data wiring of the present invention configured as described above has less bending of the wiring and a considerably shorter length than the conventional one. For example, in the conventional art, the break occurs four times in the wiring between the first pad and the second pad, but the break occurs twice in the present invention. In addition, the length of each wiring is also shorter than in the prior art because of the decrease in the bending.

Next, a process of transferring display data having the format shown in FIG. 6 from the timing controller 41 of the printed circuit board 40 to the driver ICs 61 to 66 will be described with reference to FIGS. 5 and 6.

In the present invention, since the data wiring between the pads on the printed circuit board 40 is different from the conventional scheme, the timing control section 41 has to generate the format of the display data in accordance with the changed scheme. That is, in the conventional method, the data lines between two adjacent pads are formed such that conductive lines having the same color and the same bit are connected to each other, but in the present invention, since the conductive lines of two adjacent pads are symmetrically connected to each other, The timing controller 41 should generate the format of the display data such that the bits are entirely swapped for every data capacity corresponding to one driver IC.

In Fig. 5, each of the driver ICs 61 to 66 divides the data lines on the liquid crystal panel (not shown in Fig. 5), respectively, and the timing controller 41 assigns the share of the IC to each of the driver ICs. The corresponding indication data shall be provided. The display data in FIG. 5 is an amount for displaying pixels of one horizontal scanning line. The timing controller 41 sequentially activates each driver IC, and supplies display data only to the driver ICs in the active state. That is, when the first driver IC 61 of FIG. 5 is activated, the display data output from the timing controller 41 is supplied to the driver IC 61 via the pad 42. The display data at this time is up to 128th bits of the (R7, ..., R0, G7, ..., G0, B7, ..., B0) bits shown in FIG. Next, when the second driver IC 62 of FIG. 5 is activated by the timing controller 41, the display data output from the timing controller 41 passes through the first pad 42 and the second pad 43. Is supplied to the second driver IC 62. In this case, the display data is data obtained by swapping bits of the display data for the first driver IC with each other, and (B0, ..., B7, G0, ..., G7, ..., R0, ..., R7 ) 129th to 256th data.

Hereinafter, bit swap will be described in more detail. Assuming that the display data is composed of n bits of red (R), green (G), and blue (B), the bit swap is the i (i is a variable) th bit of red (R) of the display data. Swapped to the (ni-1) th bit of (B), the i-th bit of blue (B) is swapped to the (ni-1) th bit of red (R), and the i-th bit of green (G) is drawn (G) To be replaced by the (ni-1) th bit of the "

That is, as described above, since the bit order of the data wirings are swapped between the pads, the timing controller 41 finally generates a swap in the bit order for each data corresponding to one driver IC, thereby finally generating the driver IC. Data can be passed correctly.

As described above, in the present invention, in order to simplify the data wiring between the pads of the printed circuit board 40, the conductive lines of each pad are symmetrically connected to each other with respect to the center between adjacent pads, and the timing controller 41 ), The display data is generated in accordance with the wiring patterns between the pads, so that the data wiring between the pads of the printed circuit board 40 is reduced in half and the length thereof is significantly shorter than in the related art. The data wiring structure of the present invention described above is more useful as the resolution of the liquid crystal display device becomes higher and the screen becomes larger. In other words, when the resolution is high, the number of pixels of the liquid crystal panel increases, and accordingly, the number of driver ICs or the driver IC with a large number of terminals should be used. In addition, since the data wiring between the pads must be made even finer in the printed circuit board, the data pattern having a simple structure as in the present invention has an advantage over the conventional structure in terms of formation of wiring patterns or electromagnetic interference.

Next, a second embodiment of the present invention will be described with reference to FIGS. 7 and 8.

In the second embodiment, a dual port driver IC is used. The dual port driver IC is driven by dividing the data line of the liquid crystal panel into an odd data line and an even data line. In this dual port driver IC, terminals for display data are also divided into odd and even terminals.

In a conventional liquid crystal display device, when a dual port driver IC is used, a wiring pattern for connecting even-numbered conductive lines and odd-numbered conductive lines between adjacent pads is present on different layers of the printed circuit board. Configured. This is because these wirings cross each other when present in the same layer. However, as in the present invention, when a wiring pattern in which conductive lines of pads are connected to be symmetrical with respect to the center between adjacent pads is applied, even if a dual port driver IC is used in the liquid crystal display device, Since the wiring patterns do not cross each other, all of these wiring patterns can be formed in one layer.

More specifically, in FIG. 7, odd-numbered display data bits RO7-0, GO7-0, and BO7-0 of the first pad 71 are even-numbered display data bits BE7-0 of the second pad 72. , GE7 to 0 and RE7 to 0, respectively, and the even-numbered display data bits RE7 to 0, GE7 to 0, and BE7 to 0 of the first pad 71 are odd-numbered displays of the second pad 72, respectively. Data bits BO7 to 0, GO7 to 0, and RO7 to 0 are respectively connected. That is, terminals at symmetrical positions with respect to the center line between the two pads 42 and 43 are connected to each other. In addition, data lines between the pads are alternately formed above and below the pads. In other words, the data wiring between the first pad and the second pad is formed above the two pads, and the data wiring between the second pad and the third pad is formed below the two pads.

The second embodiment is the same as the first embodiment described above except that bits of RGB are divided into even and odd numbers.

FIG. 8 shows a format of display data for supplying to a pad having the data pattern shown in FIG. 7, and this display data format is generated by the timing controller. The format of the display data shown in FIG. 8 is data necessary for driving the pixels of one horizontal scanning line. Referring to FIG. 8, the display data is divided into three colors of red, green, and blue, and the even and odd data are also divided for each color. First, each bit is (RO7, ..., RO0, GO7, ..., GO0, BO7, ..., BO0, RE7, ..., RE0, GE7, ..., GE0, BE7, ... , BE0), and the amount of data required for the first driver IC is arranged in each bit. Next, each bit is swapped with each other, and the amount of data required for the second driver IC is arranged in these swapped bits. In this manner, display data corresponding to pixels of one horizontal scanning line can be generated by swapping and arranging bits of display data for each amount of data required for one driver IC. That is, in the second embodiment of the present invention, since the bit order of the data wirings between the pads is swapped, the timing control unit finally swaps and generates the bit order for each data amount corresponding to one driver IC. Data can be correctly delivered to the IC.

As described above, in the present invention, in order to simplify the data wiring between the pads of the printed circuit board, the conductive lines of each pad are symmetrically connected to each other with respect to the center between adjacent pads. By causing the display data to be generated in accordance with the wiring pattern between the pads, the data wiring between the pads of the printed circuit board is reduced in half and the length thereof is greatly shortened compared with the conventional art. The data wiring structure of the present invention described above is more useful as the resolution of the liquid crystal display device becomes higher and the screen becomes larger.

Claims (11)

In a printed circuit board for a liquid crystal display device in which a liquid crystal panel is driven by a plurality of driver ICs, A timing controller which receives display data from a graphic source and converts the display data through bit swap for each of the driver ICs; A plurality of pads each having a plurality of conductive lines corresponding to the number of bits of the display data, the plurality of pads receiving the converted display data from the timing controller and providing the converted data to the driver ICs; And A wiring pattern connecting the conductive lines of each pad to each other between two adjacent pads of the plurality of pads, The timing controller is connected to supply display data to some of the pads, and a wiring pattern between two adjacent pads is formed such that conductive lines symmetrical with respect to the center of two adjacent pads are connected to each other. Printed circuit board for liquid crystal display device. The method of claim 1, The plurality of pads are provided as many as the number of driver IC, the printed circuit board for a liquid crystal display device. The method of claim 1, The conductive line of each pad corresponds to each bit of the display data, and the arrangement order of the conductive lines of each pad is the same in all the pads. The method of claim 1, The timing controller is connected to only the first pad of the plurality of pads, the printed circuit board for a liquid crystal display device. The method of claim 1, The printed circuit board of the plurality of pads is alternately formed on the upper and lower portions of the pads. The method of claim 1, The display data includes three colors of red, green, and blue, each of which has a predetermined number of bits. The display data includes data for driving an odd data line of a liquid crystal panel and an even data line of a liquid crystal panel. Printed circuit board for liquid crystal display device, characterized in that divided into data. The method of claim 1, The timing controller receives display data consisting of n bits of red (R), green (G), and blue (R) from a graphic source, and receives the received display data in units of data amounts required for one driver IC. And the bit order is adjusted by bit swap whenever the amount of data required for one driver IC is arranged. The method of claim 7, wherein The bit swap is, Among the display data, the i (i is variable) bit of red (R) is replaced with the (ni-1) bit of blue (B), and the i bit of blue (B) is replaced with (ni-1 of red (R). And (i) bits of the green (G) are replaced by (ni-1) th bits of the green (G). A liquid crystal panel having a plurality of data lines; A plurality of driver ICs for dividing and driving data lines of the liquid crystal panel; And A timing controller which receives display data from a graphic source and converts the display data through bit swap for each of the driver ICs; A plurality of pads each having a plurality of conductive lines corresponding to the number of bits of the display data, the plurality of pads receiving the converted display data from the timing controller and providing the converted data to the driver ICs; And a wiring pattern connecting the conductive lines of each pad to each other between two adjacent pads of the plurality of pads, wherein the timing controller is connected to supply display data to some of the pads. The wiring pattern between the two pads includes a printed circuit board formed such that conductive lines symmetrical with respect to the center of two adjacent pads are connected to each other. The method of claim 9, The timing controller receives display data consisting of n bits of red (R), green (G), and blue (R) from a graphic source, and receives the received display data in units of data amounts required for one driver IC. And arranged in bit order, wherein the bit order is adjusted by bit swap whenever the amount of data required for one driver IC is arranged. The method of claim 10, The bit swap is, Among the display data, the i (i is variable) bit of red (R) is replaced with the (ni-1) bit of blue (B), and the i bit of blue (B) is replaced with (ni-1 of red (R). And (i) bits of the green (G) are replaced by (ni-1) th bits of the green (G).

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