KR101007780B1 - Semiconductor chip bonding method and apparatus - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor chip bonding method and apparatus for directly bonding pressure-bonded semiconductor chips to a bonding pad of a substrate, and more particularly, to a semiconductor chip bonding method. The present invention relates to a semiconductor chip bonding method and apparatus capable of manufacturing a high quality semiconductor package by preventing bump collapse.

Semiconductor Chips, Boards, Bumps, Bonding Pads, Load Control, Load Cells

Description

Semiconductor chip bonding method and apparatus {METHOD AND APPARATUS FOR BONDING SEMICONDUCTOR CHIP}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor chip bonding method and apparatus for directly bonding pressure-bonded semiconductor chips to a bonding pad of a substrate, and more particularly, to a semiconductor chip bonding method. The present invention relates to a semiconductor chip bonding method and apparatus capable of manufacturing a high quality semiconductor package by preventing bump collapse.

In general, in the semiconductor industry, a semiconductor package refers to a form in which a semiconductor chip, in which a microcircuit is designed, is sealed with a mold resin or ceramic so as to be protected from an external environment and mounted on an electronic device. In recent years, semiconductor chips are packaged for the purpose of improving the performance and quality of electronic devices through miniaturization, thinning, and high functionality of electronic devices, rather than packaging semiconductor chips for the purpose of enclosing, protecting, or simply mounting electronic devices. have.

In order to support the recent trend, that is, the remarkable progress of light weight, thinning, and high performance of portable information devices such as notebook computers and mobile phones, high density packaging technology of semiconductor chips is required. That is, the semiconductor chip is formed at a fine array interval by increasing the number of electrodes to be external connection terminals with the progress of high density integration, and quickly mount the semiconductor chip without short-circuit or poor connection to the electrode formed on the substrate. For this purpose, high-density mounting technology is indispensable, and the representative mounting technology is a so-called face down bonding technology.

The face down bonding method is a technique in which a plurality of bumps, which are electrode terminals, are formed on a surface of a semiconductor chip to fabricate a chip in which bumps are formed, and are connected to a bonding pad such as a circuit board through one bonding in one bonding.

1 is a block diagram illustrating a conventional semiconductor chip bonding method, FIG. 2 is a graph illustrating a change in a moving distance and a contact load of a semiconductor chip according to an embodiment of FIG. 1, and FIG. FIG. 4 is a state diagram illustrating a bump collapse phenomenon when bonding to a substrate. FIG. 4 is a graph illustrating a change in a moving distance and a contact load of a semiconductor chip in a bonding section according to the exemplary embodiment of FIG. 3.

In the conventional semiconductor chip bonding method, as shown in FIG. 1, an alignment step S11, a chip bonding step S21, a load detection step S31, a load feedback control step S41, and a bump cooling step S51 are performed. Is made of.

The alignment step S11 vertically aligns the semiconductor chip formed to protrude bumps on one surface and the substrate on which bonding pads are formed to correspond to the bumps on an upper surface thereof.

In the chip bonding step S21, the semiconductor chip is moved toward the aligned substrate to thermally press the bumps of the semiconductor chip into contact with the bonding pads of the substrate.

The load detection step S31 detects a contact load between the bump of the semiconductor chip and the bonding pad of the substrate.

In the load feedback control step S41, when the contact load detected during the bonding time between the chip and the substrate is lower than the predetermined load value, the semiconductor chip is constantly pressed toward the substrate, and when the contact load is higher than the predetermined load value, The operation of separating the semiconductor chip from the substrate is repeatedly controlled.

In the bump cooling step S51, the bump B is cooled and solidified after the preset bonding time is completed.

As shown in FIG. 2, the moving distance and the contact load of the semiconductor chip in the process of moving the semiconductor chip toward the substrate and contacting the substrate, followed by thermal pressure, bonding the semiconductor chip to the substrate, and separating the semiconductor chip from the substrate. Indicates a change of. After the bumps of the semiconductor chip are in contact with the bonding pads of the substrate, the semiconductor chip is pressed toward the substrate until the predetermined load is reached, and the load is controlled so as to separate the semiconductor chip from the substrate when the predetermined load value is exceeded. The load control is performed by comparing the contact load detected through a load cell provided between the bonding head holding the semiconductor chip and the bonding arm by pressing or separating the semiconductor chip up or down with respect to the substrate to a predetermined load value.

However, when the semiconductor chip is bonded onto the substrate by the conventional semiconductor chip bonding method as described above, in the fine pitch package, the bump B of the semiconductor chip C is bonded to the bonding pad P of the substrate S as shown in FIG. 3. ), The semiconductor chip C is moved up and down only with respect to a preset load value when there is an abnormality in the case where the hardness of the bump is not constant, such as a mismatch between the vertical direction and the bump B. When the load feedback control is repeatedly performed, it may be operated as shown in the graph shown in FIG. 4, so that bad bonding shown in FIG. 3 may occur. That is, since the bump B of the semiconductor chip C slides down from the bonding pad P of the substrate S, bonding may not be performed properly or the bonding area may be reduced, resulting in a problem that the bonding is broken even with a small impact. And adversely affects good bonding between adjacent bumps and bonding pads. In particular, it may cause adjacent bumps and short defects, and may lead to defects in which the flowable resin injected to protect the joints after the bonding process may not be properly filled between the semiconductor chip surface and the bonding pad due to poor space between the bumps. have.

Disclosure of Invention An object of the present invention devised to solve the above problems is to prevent bump collapse caused when thermally bonding a bump of a semiconductor chip to a bonding pad of a substrate, thereby manufacturing a high quality fine pitch semiconductor package. A chip bonding method and apparatus are provided.

In order to achieve the above object, the semiconductor chip bonding method of the present invention includes an alignment step of vertically aligning a semiconductor chip formed so that bumps protrude on one surface and a substrate on which a bonding pad is formed so as to correspond to the bumps on an upper surface thereof; A chip bonding step of moving the semiconductor chip toward a substrate to thermally press the bumps of the semiconductor chips in contact with the bonding pads of the substrate, and load detection for detecting contact loads between the bumps of the semiconductor chips and the bonding pads of the substrate; And pressing the semiconductor chip constantly toward the substrate until the contact load detected during the bonding time between the semiconductor chip and the substrate reaches a predetermined load value and remains when the predetermined load value is reached. A load control and maintenance step of maintaining a constant distance between the semiconductor chip and the substrate during a bonding time, and And a bump cooling step of cooling and solidifying the bump after the set bonding time is completed.

In addition, the aligning may include fixing the semiconductor chip to the substrate by fixing the semiconductor chip using a substrate fixing step of fixing the substrate on a stage and a bonding head provided on a bonding arm that is lifted and operated by a motor. It characterized in that it comprises a chip alignment step of aligning up and down.

In addition, the bonding head is characterized in that the other surface of the semiconductor chip is sucked by a vacuum to fix.

In addition, the load detection step, characterized in that for detecting the contact load by a load cell provided between the bonding arm and the bonding head.

On the other hand, the semiconductor chip bonding apparatus according to the present invention, by fixing the stage on which the substrate with the bonding pad is formed on the upper surface, and the other surface of the semiconductor chip formed so as to protrude bumps on one surface by vacuum adsorption, the bonding pad of the substrate and the A bonding head for aligning the semiconductor chip with respect to the substrate such that bumps of the semiconductor chip face each other, a bonding arm installed to lift and operate by a motor above the stage, and supporting the bonding head; A load cell disposed between the heads to detect contact loads between the bumps of the semiconductor chip and the bonding pads of the substrate, and the bumps of the semiconductor chips fixed to the bonding heads by applying a signal to the motor to lower the bonding arms Is bonded by bonding to the bonding pad of the substrate, the bonding time of the chip and the substrate The semiconductor chip is constantly pressed toward the substrate until the load value detected by the load cell reaches a predetermined load value, and when the predetermined load value is reached, the semiconductor chip and the It comprises a control unit for maintaining a constant distance of the substrate.

The semiconductor chip bonding method and apparatus according to the present invention detect a contact load during bonding between a bump of a semiconductor chip and a bonding pad of a substrate, pressurize until reaching a predetermined load value, and then repeatedly load feedback when the predetermined load value is reached. By maintaining a constant distance between the semiconductor chip and the substrate for the remaining bonding time without control, it is possible to manufacture a high-quality fine pitch semiconductor package by minimizing bump collapse due to bump formation failure and hardness is not constant.

Hereinafter, with reference to the accompanying drawings will be described in detail a preferred embodiment of the semiconductor chip bonding method according to the present invention and a semiconductor chip bonding apparatus operating according to the method.

FIG. 5 is a block diagram showing a first embodiment of a semiconductor chip bonding method according to the present invention, FIG. 6 is a block diagram showing a second embodiment of a semiconductor chip bonding method according to the present invention, and FIG. 5 is a graph illustrating a change in the movement distance and the contact load of the semiconductor chip according to the embodiment of FIG.

First, in the semiconductor chip bonding method and apparatus according to the present invention, a face-down bonding technique for bonding a semiconductor chip C having bumps B formed on a bonding pad P formed on a substrate S at one time. Is applied.

In the semiconductor chip bonding method according to the present invention, as shown in FIGS. 5 and 6, an alignment step S101, a chip bonding step S201, a load detection step S301, a load control and maintenance step S401, and a bump are performed. It comprises a cooling step (S501), the alignment step (S101) comprises a substrate fixing step (S111) and chip alignment step (S121).

In addition, the semiconductor chip bonding apparatus according to the present invention includes a stage 100, a bonding head 200, a bonding arm 300, a load cell 400, and a controller 500 as illustrated in FIG. 8.

6 and 8, the semiconductor chip C is formed such that bumps B protrude on one surface thereof, and bonding pads P are formed on the top surface of the semiconductor chip C so as to correspond to the bumps B. FIG. The substrate S is aligned vertically. As shown in FIG. 7, the alignment step S101 includes a substrate fixing step S111 for fixing the substrate S on the stage 100, and a bonding arm 300 which is lifted and operated by the motor M. FIG. And a chip alignment step S121 of fixing the semiconductor chip C using the bonding head 200 provided in the upper and lower sides to align the semiconductor chip C up and down with respect to the substrate S.

In the substrate fixing step S111, a substrate S having a bonding pad P formed thereon is fixed on the stage 100, and the substrate S fixed on the stage 100 is a conveyor or a gripper (not shown). ) Is aligned and fixed on the stage 100. In addition, the chip alignment step (S121) is made through the bonding head 200 provided in the bonding arm 300 which is lifted and operated by the motor (M). The motor M is preferably a linear motor so that the bonding arm 300 can be moved up and down accurately and quickly, and the bonding arm 300 is connected to the motor M to drive the motor M. FIG. According to the bonding arm 300 is to move up and down. The bonding head 300 fixes the semiconductor chip C to align the semiconductor chip C up and down with respect to the substrate S. FIG. That is, as illustrated in FIG. 8, the bonding head 300 sucks and fixes the other surface of the semiconductor chip C formed so that the bump B protrudes on one surface by vacuum, and the bonding pad P of the substrate S is fixed. ) And the semiconductor chip C with respect to the substrate S so that the bumps B of the semiconductor chip C face each other. Since the substrate fixing step (S111) and the chip alignment step (S121) can be implemented in the prior art, a detailed description thereof will be omitted.

In the load detection step S301, a contact load between the bump B of the semiconductor chip C and the bonding pad P of the substrate S is detected. Here, the contact load means that the bump B formed on the semiconductor chip C is lowered toward the substrate S in a state where the semiconductor chip C is attracted and fixed by the bonding head 200 and fixed to the substrate S. When contact-pressurized by the bonding pad P, the repulsive force generate | occur | produces upward through bump B and the semiconductor chip C is said. In order to measure the contact load as described above, a load cell 400 is installed between the bonding arm 300 and the bonding head 200 to bond the bump B and the substrate S of the semiconductor chip C. The contact load between the pads P is detected. The load cell 400 is a kind of load gauge, and is a transducer that converts by a voltage or pressure proportional to a force (load) applied from the outside, and includes an electric resistance strain gauge type, a hydraulic type, and a pressurized type. This uses, and also applies a strain gauge load cell in the present invention. In other words, the strain gauge load cell is installed so that it can be converted into a voltage proportional to the load by adhering an electric resistance strain gauge to an elastically deformed place under weight, and having good precision, linearity and responsiveness, and small size. This is because it has the advantage of being easy to measure and record.

As shown in FIG. 7, the load control and maintenance step S401 is performed until the contact load detected during the bonding time between the semiconductor chip C and the substrate S reaches a predetermined load value. The chip C is constantly pressed toward the substrate S, and when the predetermined load value is reached, the distance between the semiconductor chip C and the substrate S is kept constant for the remaining bonding time. The load control and maintenance step S401 is performed by the control unit 500 shown in FIG. 8, and the control unit 500 applies a signal to the motor M to perform the load control and maintenance step S401. By lowering the bonding arm 300, the bump B of the semiconductor chip C fixed to the bonding head 200 is contacted and pressed by the bonding pad P of the substrate S. That is, the semiconductor chip C fixed to the bonding head 200 is lowered toward the substrate S fixed on the stage 100 so that the bumps B of the semiconductor chip C are bonded to the bonding pads of the substrate S. FIG. Bonding is performed by contact heat pressurization to (P), wherein the bonding time of the semiconductor chip C and the substrate S is set in advance. Accordingly, the contact load is detected by the load cell 400 during the bonding time of the semiconductor chip C and the substrate S, and the contact load detected by the load cell 400 and a predetermined load value to the controller 500. Compare The control unit 500 maintains the motor M until the contact load detected by the load cell 400 reaches a predetermined load value while the semiconductor chip C is bonded to the substrate S by thermal contact pressure. ), The bonding arm 300 is lowered, and at the same time, the semiconductor chip C fixed to the bonding head 200 is constantly pressed toward the substrate S. When the contact load detected by the load cell 400 reaches a predetermined load value, the motor M to keep the distance between the semiconductor chip C and the substrate S constant for the remaining bonding time. Stops driving. Here, the predetermined load value means that when the bump B of the semiconductor chip C and the bonding pad P of the substrate S come into contact with each other and are thermally pressurized, the bump B is pressed against the bonding pad P to cause deformation. The load is obtained when the bump B is bonded to the bonding pad P by deforming to the most suitable shape by experiment. When the load control is performed by the control unit 500 as described above, even if the bump collapse occurs and the load value detected from the load cell 400 becomes small, without continuously applying pressure, when the predetermined load value is reached, the semiconductor chip Bonding may be completed by deforming the bump B of an appropriate shape by keeping the bump B of (C) at a predetermined distance from the bonding pad P of the substrate S. FIG.

After the preset bonding time is completed, the fixing of the semiconductor chip C is released from the bonding head 200, and only the bonding head 200 is separated from the semiconductor chip C bonded to the substrate S to rise. , Bonding is completed. In this case, since the bump B formed on the semiconductor chip C is heated to maintain a shape deformation state, the bump cooling step S501 for cooling the bump B is performed.

The bump cooling step S501 cools and solidifies the bump B after the preset bonding time is completed. After the bump B of the semiconductor chip C is thermally pressurized by the bonding pad P of the substrate S to complete bonding, the bump B is cooled and solidified to complete the semiconductor package. The bump cooling step S501 may solidify the bump B by naturally cooling it in the air or by forcibly cooling it at a lower temperature.

The embodiments of the present invention described above and illustrated in the drawings should not be construed as limiting the technical idea of the present invention. The protection scope of the present invention is limited only by the matters described in the claims, and those skilled in the art can change and change the technical idea of the present invention in various forms. Therefore, such improvements and modifications will fall within the protection scope of the present invention, as will be apparent to those skilled in the art.

1 is a block diagram showing a conventional semiconductor chip bonding method,

FIG. 2 is a graph illustrating changes in moving distance and contact load of a semiconductor chip according to an embodiment of FIG. 1;

3 is a state diagram illustrating a bump collapse phenomenon when bonding a semiconductor chip to a substrate;

4 is a graph illustrating changes in a moving distance and a contact load of a semiconductor chip in a bonding section according to the embodiment of FIG. 3.

5 is a block diagram showing a first embodiment of a semiconductor chip bonding method according to the present invention;

6 is a block diagram showing a second embodiment of a semiconductor chip bonding method according to the present invention;

FIG. 7 is a graph illustrating changes in movement distance and contact load of a semiconductor chip according to an embodiment of FIG. 5;

8 is a block diagram illustrating a semiconductor chip bonding apparatus according to the present invention.

<Explanation of symbols for the main parts of the drawings>

S: Substrate P: Bonding Pad

C: semiconductor chip B: bump

M: motor

100: stage

200: bonding head

300: bonding arm

400: load cell

500: control unit

Claims (5)

Vertically aligning the semiconductor chip having bumps formed on one surface thereof and a substrate on which a bonding pad is formed to correspond to the bumps on an upper surface thereof; Moving the semiconductor chip toward the aligned substrate to thermally press the bump of the semiconductor chip in contact with a bonding pad of the substrate; Detecting a contact load between a bump of the semiconductor chip and a bonding pad of the substrate; Pressing the semiconductor chip constantly toward the substrate by driving a motor until a contact load between the semiconductor chip and the substrate reaches a predetermined load value for a predetermined bonding time; Stopping driving of the motor when the contact load reaches a predetermined load value to maintain a constant distance between the semiconductor chip and the substrate for the remaining bonding time of the preset bonding time; And a bump cooling step of cooling and solidifying the bump after the preset bonding time is completed. The method of claim 1, Aligning the substrate up and down, A substrate fixing step of fixing the substrate on a stage; And a chip alignment step of fixing the semiconductor chip using a bonding head provided in a bonding arm lifted and operated by a motor to align the semiconductor chip up and down with respect to the substrate. The method of claim 2, The bonding head is a semiconductor chip bonding method, characterized in that for fixing the other surface of the semiconductor chip by suction. The method of claim 2, The load detection step, And a contact load is detected by a load cell provided between the bonding arm and the bonding head. delete

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