KR20020003512A - 반도체 장치 및 그 제조 방법 - Google Patents
반도체 장치 및 그 제조 방법 Download PDFInfo
- Publication number
- KR20020003512A KR20020003512A KR1020010039439A KR20010039439A KR20020003512A KR 20020003512 A KR20020003512 A KR 20020003512A KR 1020010039439 A KR1020010039439 A KR 1020010039439A KR 20010039439 A KR20010039439 A KR 20010039439A KR 20020003512 A KR20020003512 A KR 20020003512A
- Authority
- KR
- South Korea
- Prior art keywords
- semiconductor chip
- substrate
- slit
- semiconductor device
- epoxy resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
- H10W70/65—Shapes or dispositions of interconnections
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/131—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/551—Materials of bond wires
- H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
- H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/59—Bond pads specially adapted therefor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/931—Shapes of bond pads
- H10W72/932—Plan-view shape, i.e. in top view
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/941—Dispositions of bond pads
- H10W72/944—Dispositions of multiple bond pads
- H10W72/9445—Top-view layouts, e.g. mirror arrays
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/951—Materials of bond pads
- H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Wire Bonding (AREA)
Abstract
Description
Claims (10)
- 제 1의 표면상에 제 1의 방향으로 배치된 복수개의 전극 패드를 구비하는 반도체 칩과;상기 제 1의 표면에 부착되고, 상기 전극 패드와 정합하며 상기 제 1의 방향으로 연장하는 제 1의 슬릿과 상기 제 1의 방향에 수직인 방향으로 연장하는 제 2의 슬릿이 마련되며, 적어도 4개의 영역으로 분할되는 기판;상기 기판상에 형성된 솔더 볼; 및상기 솔더 볼 및 대응하는 전극 패드 각각을 접속하는 배선을 포함하는 것을 특징으로 하는 반도체 장치.
- 제 1항에 있어서,상기 슬릿은 상기 반도체 칩의 경계 밖으로 연장된 것을 특징으로 하는 반도체 장치.
- 제 1항에 있어서,상기 반도체 칩은 상기 제 2의 슬릿을 정합하는 소정의 위치에 전극 패드를 포함하는 것을 특징으로 하는 반도체 장치.
- 제 2항에 있어서,상기 반도체 칩은 상기 제 2의 슬릿을 정합하는 소정의 위치에 전극 패드를 포함하는 것을 특징으로 하는 반도체 장치.
- 제 1항에 있어서,상기 기판은 유리 에폭시 수지로 이루어지고, 아크릴 고무를 함유하는 에폭시 수지로 이루어진 접착제를 사용하여 상기 반도체 칩에 접합되는 것을 특징으로 하는 반도체 장치.
- 제 2항에 있어서,상기 기판은 유리 에폭시 수지로 이루어지고, 아크릴 고무를 함유하는 에폭시 수지로 이루어진 접착제를 사용하여 상기 반도체 칩에 접합되는 것을 특징으로 하는 반도체 장치.
- 제 3항에 있어서,상기 기판은 유리 에폭시 수지로 이루어지고, 아크릴 고무를 함유하는 에폭시 수지로 이루어진 접착제를 사용하여 상기 반도체 칩에 접합되는 것을 특징으로 하는 반도체 장치.
- 제 4항에 있어서.상기 기판은 유리 에폭시 수지로 이루어지고, 아크릴 고무를 함유하는 에폭시 수지로 이루어진 접착제를 사용하여 상기 반도체 칩에 접합되는 것을 특징으로 하는 반도체 장치.
- 반도체 칩이 각각의 상부에 장착될 기판 부재의 다수의 장착 영역 각각에 서로 수직으로 교차하는 제 1 및 제 2의 슬릿을 형성하는 단계; 및상기 제 1의 슬릿을 정합하는 영역에 형성된 전극 패드를 구비하는 상기 반도체 칩을 각각의 상기 장착 영역용의 상기 기판 부재에 접합하는 단계, 및;각각의 상기 장착 영역용의 상기 기판 부재를 분할하는 단계를 포함하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제 9항에 있어서,상기 기판 부재 분할 단계 이전에,상기 기판 부재 상에 솔더 볼을 형성하는 단계;각각의 배선을 통해 상기 전극 패드에 상기 솔더 볼을 접속하는 단계; 및상기 제 1 및 제 2의 슬릿에 수지 재료를 주입하는 단계를 더 포함하는 것을 특징으로 하는 반도체 장치의 제조 방법.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JPJP-P-2000-00202248 | 2000-07-04 | ||
| JP2000202248A JP2002026179A (ja) | 2000-07-04 | 2000-07-04 | 半導体装置およびその製造方法 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR20020003512A true KR20020003512A (ko) | 2002-01-12 |
Family
ID=18699798
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020010039439A Abandoned KR20020003512A (ko) | 2000-07-04 | 2001-07-03 | 반도체 장치 및 그 제조 방법 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US20010042916A1 (ko) |
| JP (1) | JP2002026179A (ko) |
| KR (1) | KR20020003512A (ko) |
| TW (1) | TW497232B (ko) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100743319B1 (ko) * | 2005-05-31 | 2007-07-26 | 가부시끼가이샤 도시바 | 표면 실장형 반도체 장치 및 그 제조 방법 |
| US8116088B2 (en) | 2007-05-09 | 2012-02-14 | Samsung Electronics Co., Ltd. | Semiconductor package and method of forming the same, and printed circuit board |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5155644B2 (ja) * | 2007-07-19 | 2013-03-06 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| TW200910564A (en) * | 2007-08-17 | 2009-03-01 | United Test Ct Inc | Multi-substrate block type package and its manufacturing method |
-
2000
- 2000-07-04 JP JP2000202248A patent/JP2002026179A/ja not_active Abandoned
-
2001
- 2001-06-21 US US09/886,844 patent/US20010042916A1/en not_active Abandoned
- 2001-07-03 KR KR1020010039439A patent/KR20020003512A/ko not_active Abandoned
- 2001-07-03 TW TW090116320A patent/TW497232B/zh not_active IP Right Cessation
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100743319B1 (ko) * | 2005-05-31 | 2007-07-26 | 가부시끼가이샤 도시바 | 표면 실장형 반도체 장치 및 그 제조 방법 |
| US8116088B2 (en) | 2007-05-09 | 2012-02-14 | Samsung Electronics Co., Ltd. | Semiconductor package and method of forming the same, and printed circuit board |
Also Published As
| Publication number | Publication date |
|---|---|
| US20010042916A1 (en) | 2001-11-22 |
| TW497232B (en) | 2002-08-01 |
| JP2002026179A (ja) | 2002-01-25 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US11700692B2 (en) | Stackable via package and method | |
| US4677526A (en) | Plastic pin grid array chip carrier | |
| US7812464B2 (en) | Semiconductor device and a method of manufacturing for high output MOSFET | |
| EP0179577B1 (en) | Method for making a semiconductor device having conductor pins | |
| US6114763A (en) | Semiconductor package with translator for connection to an external substrate | |
| US5942795A (en) | Leaded substrate carrier for integrated circuit device and leaded substrate carrier device assembly | |
| US20120086111A1 (en) | Semiconductor device | |
| JP3293334B2 (ja) | 半導体装置及びその製造方法 | |
| US20090091031A1 (en) | Semiconductor device | |
| JPH0831667B2 (ja) | パッケージ化電子ハードウェア・ユニット | |
| US20100259908A1 (en) | Exposed die pad package with power ring | |
| JP3574450B1 (ja) | 半導体装置、及び半導体装置の製造方法 | |
| KR20020027233A (ko) | 반도체 장치 및 그의 제조 방법 | |
| US6437436B2 (en) | Integrated circuit chip package with test points | |
| KR20010014945A (ko) | 반도체장치의 제조방법 | |
| KR100412157B1 (ko) | 반도체장치 및 그 제조방법 | |
| KR20020003512A (ko) | 반도체 장치 및 그 제조 방법 | |
| KR20040108563A (ko) | 반도체 장치 | |
| KR100353105B1 (ko) | Bga 구조를 갖는 반도체 장치 및 그 제조 방법 | |
| JP3627238B2 (ja) | 半導体装置およびその製造方法 | |
| US20040159925A1 (en) | Semiconductor device and method for manufacture thereof | |
| KR100520443B1 (ko) | 칩스케일패키지및그제조방법 | |
| JPH10154768A (ja) | 半導体装置及びその製造方法 | |
| KR200231862Y1 (ko) | 반도체 패키지 | |
| KR200328474Y1 (ko) | 볼그리드어레이패키지 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A201 | Request for examination | ||
| PA0109 | Patent application |
St.27 status event code: A-0-1-A10-A12-nap-PA0109 |
|
| PA0201 | Request for examination |
St.27 status event code: A-1-2-D10-D11-exm-PA0201 |
|
| PG1501 | Laying open of application |
St.27 status event code: A-1-1-Q10-Q12-nap-PG1501 |
|
| N231 | Notification of change of applicant | ||
| PN2301 | Change of applicant |
St.27 status event code: A-3-3-R10-R13-asn-PN2301 St.27 status event code: A-3-3-R10-R11-asn-PN2301 |
|
| E902 | Notification of reason for refusal | ||
| PE0902 | Notice of grounds for rejection |
St.27 status event code: A-1-2-D10-D21-exm-PE0902 |
|
| T11-X000 | Administrative time limit extension requested |
St.27 status event code: U-3-3-T10-T11-oth-X000 |
|
| T11-X000 | Administrative time limit extension requested |
St.27 status event code: U-3-3-T10-T11-oth-X000 |
|
| P11-X000 | Amendment of application requested |
St.27 status event code: A-2-2-P10-P11-nap-X000 |
|
| P13-X000 | Application amended |
St.27 status event code: A-2-2-P10-P13-nap-X000 |
|
| E701 | Decision to grant or registration of patent right | ||
| PE0701 | Decision of registration |
St.27 status event code: A-1-2-D10-D22-exm-PE0701 |
|
| PN2301 | Change of applicant |
St.27 status event code: A-3-3-R10-R13-asn-PN2301 St.27 status event code: A-3-3-R10-R11-asn-PN2301 |
|
| NORF | Unpaid initial registration fee | ||
| PC1904 | Unpaid initial registration fee |
St.27 status event code: A-2-2-U10-U13-oth-PC1904 St.27 status event code: N-2-6-B10-B12-nap-PC1904 |
|
| PN2301 | Change of applicant |
St.27 status event code: A-3-3-R10-R13-asn-PN2301 St.27 status event code: A-3-3-R10-R11-asn-PN2301 |
|
| R18-X000 | Changes to party contact information recorded |
St.27 status event code: A-3-3-R10-R18-oth-X000 |
|
| R18-X000 | Changes to party contact information recorded |
St.27 status event code: A-3-3-R10-R18-oth-X000 |
|
| P22-X000 | Classification modified |
St.27 status event code: A-2-2-P10-P22-nap-X000 |