KR970053520A - 반도체 장치의 건식 식각 공정에서 발생하는 반응성 생성물의 제거 방법 및 이를 이용한 금속배선 형성 방법 - Google Patents

반도체 장치의 건식 식각 공정에서 발생하는 반응성 생성물의 제거 방법 및 이를 이용한 금속배선 형성 방법 Download PDF

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Publication number
KR970053520A
KR970053520A KR1019950047587A KR19950047587A KR970053520A KR 970053520 A KR970053520 A KR 970053520A KR 1019950047587 A KR1019950047587 A KR 1019950047587A KR 19950047587 A KR19950047587 A KR 19950047587A KR 970053520 A KR970053520 A KR 970053520A
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South Korea
Prior art keywords
semiconductor device
dry etching
metal wiring
forming
metal layer
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KR1019950047587A
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English (en)
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KR100188001B1 (ko
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유왕희
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김광호
삼성전자 주식회사
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Priority to KR1019950047587A priority Critical patent/KR100188001B1/ko
Publication of KR970053520A publication Critical patent/KR970053520A/ko
Assigned to 페어차일드코리아반도체 주식회사 reassignment 페어차일드코리아반도체 주식회사 권리의 이전등록 Assignors: 삼성전자주식회사
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/42—Vias, e.g. via plugs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/73—Etching of wafers, substrates or parts of devices using masks for insulating materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00—Cleaning of wafers, substrates or parts of devices
    • H10P70/20—Cleaning during device manufacture
    • H10P70/23—Cleaning during device manufacture during, before or after processing of insulating materials
    • H10P70/234—Cleaning during device manufacture during, before or after processing of insulating materials the processing being the formation of vias or contact holes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

본 발명은 반도체 소자의 제조 공정 특히, 다층 금속배선이 적용되는 반도체 소자의 제조 공정에 있어서 건식식각시 발생하는 반응성 생성물을 초음파 세정으로 제거하는 방법 및 이를 이용한 금속배선 형성 방법에 관한 것으로서, 반도체 장치의 절연막 건식 식각이 완료된 후 감광막을 산소 플라즈마를 이용하여 제거하고, 웨이퍼를 초음파가 인가된 순수(순수한 물:D.I)에 넣어 세정함으로써, 반응성 생성물 잔존에 의한 반도체 장치의 불량을 방지하여 반도체 제조 공정의 안정화 및 반도체 제조 수율을 향상시킬 수 있는 것이다.

Description

반도체 장치의 건식 식각 공정에서 발생하는 반응성 생성물의 제거 방법 및 이를 이용한 금속배선 형성 방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 다층금속배선 구조를 갖는 반도체 장치의 절연막 식각 공정을 도시한 도면이다.

Claims (2)

  1. 반도체 장치의 절연막 건식 식각이 완료된 후 감광막을 산소 플라즈마를 이용하여 제거하고, 상기 제거 공정시 생성되어 부착된 반응성 생성물을 제거하기 위해 웨이퍼를 초음파가 인가된 순수에 넣어 세정하는 것을 특징으로 하는 반도체 장치의 건식 식각 공정에서 발생하는 반응성 생성물의 제거 방법.
  2. 실리콘 기판 상에 하부 금속층을 형성하는 단계; 상기 하부 금속층을 절연막으로 덮는 단계; 상기 절연막상에 콘택홀 형성을 위한 패턴을 형성하는 단계; 상기 감광막 패턴을 마스크로 하여 절연막을 선택적으로 식각하는 단계; 상기 식각 단계에서 생성되어 상기 절연막의 측벽과 노출된 하부 금속층 표면에 부착된 반응성 생성물을 초음파 세정으로 제거하는 단계; 상기 결과물 상에 상부 금속층을 형성하는 단계를 구비하는 것을 특징으로 하는 반도체 장치의 금속배선 형성 방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019950047587A 1995-12-07 1995-12-07 반도체 소자의 다층 배선 형성방법 Expired - Fee Related KR100188001B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950047587A KR100188001B1 (ko) 1995-12-07 1995-12-07 반도체 소자의 다층 배선 형성방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950047587A KR100188001B1 (ko) 1995-12-07 1995-12-07 반도체 소자의 다층 배선 형성방법

Publications (2)

Publication Number Publication Date
KR970053520A true KR970053520A (ko) 1997-07-31
KR100188001B1 KR100188001B1 (ko) 1999-06-01

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ID=19438390

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950047587A Expired - Fee Related KR100188001B1 (ko) 1995-12-07 1995-12-07 반도체 소자의 다층 배선 형성방법

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100364073B1 (ko) * 2000-03-24 2002-12-11 주식회사 기림세미텍 플라즈마 식각 장치 및 이를 이용한 식각 방법

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100364073B1 (ko) * 2000-03-24 2002-12-11 주식회사 기림세미텍 플라즈마 식각 장치 및 이를 이용한 식각 방법

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Publication number Publication date
KR100188001B1 (ko) 1999-06-01

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