KR970077209A - Method of forming a contact hole in a semiconductor device - Google Patents

Method of forming a contact hole in a semiconductor device Download PDF

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Publication number
KR970077209A
KR970077209A KR1019960017136A KR19960017136A KR970077209A KR 970077209 A KR970077209 A KR 970077209A KR 1019960017136 A KR1019960017136 A KR 1019960017136A KR 19960017136 A KR19960017136 A KR 19960017136A KR 970077209 A KR970077209 A KR 970077209A
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KR
South Korea
Prior art keywords
forming
contact hole
buffer layer
layer
semiconductor device
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KR1019960017136A
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Korean (ko)
Inventor
안성환
백현철
이영철
Original Assignee
김주용
현대전자산업 주식회사
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Priority to KR1019960017136A priority Critical patent/KR970077209A/en
Publication of KR970077209A publication Critical patent/KR970077209A/en
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/082—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts the openings being tapered via holes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/73—Etching of wafers, substrates or parts of devices using masks for insulating materials

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  • Drying Of Semiconductors (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

본 발명은 반도체 소자의 콘택 홀 형성 방법에 관한 것으로, 노광 장비의 임계 치수(Critical dimension)보다 작은 폭을 갖는 콘택홀을 형성하기 위하여 감광막 하부에 버퍼층을 형성하고, 상기 버퍼층 식각시 생성된 폴리머가 상기 버퍼층의 식각된 측벽에 증착되도록 한다. 그리고 노출된 부분의 절연층을 식각하므로써 노관 장비의 임계 치수보다 작은 폭을 갖는 미세 콘택 홀을 형성할 수 있으며, 따라서 반도체 소자의 집적도를 향상시킬수 있는 반도체 소자의 콘택 홀 형성 방법에 관한 것이다.The present invention relates to a method for forming a contact hole in a semiconductor device, in which a buffer layer is formed under a photoresist layer to form a contact hole having a width smaller than a critical dimension of an exposure apparatus, To be deposited on the etched sidewalls of the buffer layer. And a method of forming a contact hole in a semiconductor device capable of forming a fine contact hole having a width smaller than a critical dimension of the furnace tube by etching the insulating layer of the exposed portion and thus improving the degree of integration of the semiconductor element.

Description

반도체 소자의 콘택 홀 형성 방법Method of forming a contact hole in a semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is a trivial issue, I did not include the contents of the text.

제2A 내지 제 2C도는 본 발명에 따른 반도체 소자의 콘택 홀 형성 방법을 설명하기 위한 소자의 단면도.2A to 2C are sectional views of a device for explaining a contact hole forming method of a semiconductor device according to the present invention.

Claims (6)

반도체 소자의 콘택 홀 형성 방법에 있어서, 절연층이 형성된 실리콘 기판상에 버퍼층 및 감광막을 순차적으로 형성한 후 콘택 마스크를 이용하여 상기 감광막을 패터닝하는 단계와, 상기 단계로부터 상기 패터닝된 감광막을 마스크로 이용하여 상기 버퍼층을 식각하되, 상기 버퍼층 식각시 상기 감광막의 반응에 의해 생성된 폴리머가 상기 식각된 버퍼층의 측벽에 증착되도록 한 후 노출된 부분의 상기 절연층을 식각하여 콘택 홀을 형성하는 단계와, 상기 단계로부터 잔류된 상기 감광막 및 버퍼층을 순차적으로 제거하는 단계로 이루어지는 것을 특징으로 하는 반도체 소자의 콘택 홀 형성 방법.A method of forming a contact hole in a semiconductor device, the method comprising: sequentially forming a buffer layer and a photoresist layer on a silicon substrate having an insulating layer formed thereon; patterning the photoresist layer using a contact mask; Forming a contact hole by etching the buffer layer and etching the insulating layer of the exposed portion after the polymer generated by the reaction of the photoresist layer is deposited on the sidewall of the etched buffer layer; And sequentially removing the photoresist film and the buffer layer remaining from the step. 제1항에 있어서, 상기 버퍼층은 식각 공정시 폴리머의 생성이 가능한 물질로 형성되는 것을 특징으로 하는 반도체 소자의 콘택 홀 형성 방법.The method of claim 1, wherein the buffer layer is formed of a material capable of forming a polymer during an etching process. 제2항에 있어서, 상기 물질은 폴리실리콘인 것을 특징으로 하는 반도체 소자의 콘택홀 형성 방법.3. The method of claim 2, wherein the material is polysilicon. 제2항에 있어서, 상기 물질은 질화막인 것을 특징으로 하는 반도체 소자의 콘택홀 형성 방법.The method of claim 2, wherein the material is a nitride film. 제1 또는 제2항에 있어서, 상기 버퍼층은 2000 내지 5000A의 두께로 형성되는 것을 특징으로 하는 반도체소자의 콘택 홀 형성 방법.The method of claim 1 or 2, wherein the buffer layer is formed to a thickness of 2000 to 5000 A. 제1항에 있어서, 상기 버퍼층 및 절연층은 플라즈마 식각 방법으로 식각되는 것을 특징으로 하는 반도체소자의 콘택 홀 형성 방법.The method of claim 1, wherein the buffer layer and the insulating layer are etched by a plasma etching method. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: It is disclosed by the contents of the first application.
KR1019960017136A 1996-05-21 1996-05-21 Method of forming a contact hole in a semiconductor device Withdrawn KR970077209A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019960017136A KR970077209A (en) 1996-05-21 1996-05-21 Method of forming a contact hole in a semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960017136A KR970077209A (en) 1996-05-21 1996-05-21 Method of forming a contact hole in a semiconductor device

Publications (1)

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KR970077209A true KR970077209A (en) 1997-12-12

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KR1019960017136A Withdrawn KR970077209A (en) 1996-05-21 1996-05-21 Method of forming a contact hole in a semiconductor device

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010060984A (en) * 1999-12-28 2001-07-07 박종섭 Manufacturing method for contact hole in semiconductor device
KR100485159B1 (en) * 2003-01-30 2005-04-22 동부아남반도체 주식회사 Formation method of contact hole in semiconductor device
KR100632575B1 (en) * 2000-06-22 2006-10-09 주식회사 하이닉스반도체 Capacitor Formation Method of Semiconductor Device
KR100695756B1 (en) * 1999-11-15 2007-03-15 (주) 인텔리마이크론즈 Riga process and method of manufacturing microstructures using the same
KR100721250B1 (en) * 2005-12-29 2007-05-22 동부일렉트로닉스 주식회사 Method of forming fine contact hole in semiconductor device
KR100801307B1 (en) * 2005-06-28 2008-02-05 주식회사 하이닉스반도체 Method for fabricating semiconductor device

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100695756B1 (en) * 1999-11-15 2007-03-15 (주) 인텔리마이크론즈 Riga process and method of manufacturing microstructures using the same
KR20010060984A (en) * 1999-12-28 2001-07-07 박종섭 Manufacturing method for contact hole in semiconductor device
KR100632575B1 (en) * 2000-06-22 2006-10-09 주식회사 하이닉스반도체 Capacitor Formation Method of Semiconductor Device
KR100485159B1 (en) * 2003-01-30 2005-04-22 동부아남반도체 주식회사 Formation method of contact hole in semiconductor device
KR100801307B1 (en) * 2005-06-28 2008-02-05 주식회사 하이닉스반도체 Method for fabricating semiconductor device
US7670957B2 (en) 2005-06-28 2010-03-02 Hynix Semiconductor Inc. Method for fabricating semiconductor device
KR100721250B1 (en) * 2005-12-29 2007-05-22 동부일렉트로닉스 주식회사 Method of forming fine contact hole in semiconductor device

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