LU61440A1 - - Google Patents

Info

Publication number
LU61440A1
LU61440A1 LU61440DA LU61440A1 LU 61440 A1 LU61440 A1 LU 61440A1 LU 61440D A LU61440D A LU 61440DA LU 61440 A1 LU61440 A1 LU 61440A1
Authority
LU
Luxembourg
Application number
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of LU61440A1 publication Critical patent/LU61440A1/xx

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q11/00Selecting arrangements for multiplex systems
    • H04Q11/04Selecting arrangements for multiplex systems for time-division multiplexing
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/062Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
    • H04J3/0626Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers plesiochronous multiplexing systems, e.g. plesiochronous digital hierarchy [PDH], jitter attenuators
    • H04J3/0629Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers plesiochronous multiplexing systems, e.g. plesiochronous digital hierarchy [PDH], jitter attenuators in a network, e.g. in combination with switching or multiplexing, slip buffers
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/07Synchronising arrangements using pulse stuffing for systems with different or fluctuating information rates or bit rates
    • H04J3/073Bit stuffing, e.g. PDH

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Hardware Design (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
LU61440D 1969-07-31 1970-07-29 LU61440A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19691939027 DE1939027B2 (de) 1969-07-31 1969-07-31 Schaltungsanordnung zur Durchschaltung von Nachrichtenkanaelen in einer PCM-Zeitmultiplexvermittlungsstelle

Publications (1)

Publication Number Publication Date
LU61440A1 true LU61440A1 (fr) 1970-10-05

Family

ID=5741539

Family Applications (1)

Application Number Title Priority Date Filing Date
LU61440D LU61440A1 (fr) 1969-07-31 1970-07-29

Country Status (8)

Country Link
AT (1) AT303837B (fr)
BE (1) BE754155A (fr)
CH (1) CH518667A (fr)
DE (1) DE1939027B2 (fr)
FR (1) FR2060575A5 (fr)
GB (1) GB1275520A (fr)
LU (1) LU61440A1 (fr)
NL (1) NL7010800A (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3104002C2 (de) * 1981-02-05 1984-01-26 Siemens AG, 1000 Berlin und 8000 München Schaltungsanordnung für Fernmeldevermittlungsanlagen, insbesondere PCM-Fernsprechvermittlungsanlagen, mit einer Zeitmultiplexkoppelanordnung mit Zeitlagenvielfachen

Also Published As

Publication number Publication date
GB1275520A (en) 1972-05-24
DE1939027A1 (fr) 1971-02-11
DE1939027B2 (de) 1971-02-11
AT303837B (de) 1972-12-11
FR2060575A5 (fr) 1971-06-18
NL7010800A (fr) 1971-02-02
CH518667A (de) 1972-01-31
BE754155A (fr) 1971-02-01

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