MX2017006130A - Metodo para producir un modulo electronico de un solo lado que incluye zonas de interconexion. - Google Patents

Metodo para producir un modulo electronico de un solo lado que incluye zonas de interconexion.

Info

Publication number
MX2017006130A
MX2017006130A MX2017006130A MX2017006130A MX2017006130A MX 2017006130 A MX2017006130 A MX 2017006130A MX 2017006130 A MX2017006130 A MX 2017006130A MX 2017006130 A MX2017006130 A MX 2017006130A MX 2017006130 A MX2017006130 A MX 2017006130A
Authority
MX
Mexico
Prior art keywords
metallizations
produce
electronic module
side electronic
includes interconnection
Prior art date
Application number
MX2017006130A
Other languages
English (en)
Other versions
MX378922B (es
Inventor
Ottobon Stéphane
Dossetto Lucile
Charles Luc
Laviron Thierry
Original Assignee
Gemalto Sa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gemalto Sa filed Critical Gemalto Sa
Publication of MX2017006130A publication Critical patent/MX2017006130A/es
Publication of MX378922B publication Critical patent/MX378922B/es

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G06K19/0775—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna
    • G06K19/07754—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna the connection being galvanic
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745—Mounting details of integrated circuit chips
    • G06K19/07747—Mounting details of integrated circuit chips at least one of the integrated circuit chips being mounted as a module
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G06K19/07766—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card comprising at least a second communication arrangement in addition to a first non-contact communication arrangement
    • G06K19/07769—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card comprising at least a second communication arrangement in addition to a first non-contact communication arrangement the further communication means being a galvanic interface, e.g. hybrid or mixed smart cards having a contact and a non-contact interface
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/015—Manufacture or treatment of bond wires
    • H10W72/01515—Forming coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Credit Cards Or The Like (AREA)
  • Combinations Of Printed Boards (AREA)
  • Wire Bonding (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

La invención se relaciona con un método para producir un módulo (17) que tiene un chip electrónico que incluye metalizaciones las cuales son accesibles desde un primer lado de las metalizaciones y un chip de circuito integrado el cual se dispone en el segundo lado de las metalizaciones, opuesto al primer lado. El método se caracteriza porque comprende la etapa de formar elementos (9C, 9C, 30) de interconexión eléctrica que se separan de las metalizaciones, conectando de forma directa el chip, y se disponen en el segundo lado de las metalizaciones. La invención también se relaciona con un módulo correspondiente al método y con un dispositivo que comprende tal módulo.
MX2017006130A 2015-02-20 2016-02-09 Método para producir un módulo electrónico de un solo lado que incluye zonas de interconexión. MX378922B (es)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP15305271.7A EP3059698B1 (fr) 2015-02-20 2015-02-20 Procédé de fabrication d'un module électronique simple face comprenant des zones d'interconnexion
PCT/EP2016/052744 WO2016131682A1 (fr) 2015-02-20 2016-02-09 Procede de fabrication d'un module electronique simple face comprenant des zones d'interconnexion

Publications (2)

Publication Number Publication Date
MX2017006130A true MX2017006130A (es) 2018-02-09
MX378922B MX378922B (es) 2025-03-11

Family

ID=52648959

Family Applications (1)

Application Number Title Priority Date Filing Date
MX2017006130A MX378922B (es) 2015-02-20 2016-02-09 Método para producir un módulo electrónico de un solo lado que incluye zonas de interconexión.

Country Status (13)

Country Link
US (1) US10282652B2 (es)
EP (2) EP3869409A1 (es)
JP (2) JP6453472B2 (es)
KR (1) KR102014621B1 (es)
CN (1) CN107111779B (es)
AU (1) AU2016221971B2 (es)
CA (1) CA2968070C (es)
ES (1) ES2867102T3 (es)
MX (1) MX378922B (es)
PL (1) PL3059698T3 (es)
SG (1) SG11201703935TA (es)
WO (1) WO2016131682A1 (es)
ZA (1) ZA201703296B (es)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3047101B1 (fr) 2016-01-26 2022-04-01 Linxens Holding Procede de fabrication d’un module de carte a puce et d’une carte a puce
US11264314B2 (en) * 2019-09-27 2022-03-01 International Business Machines Corporation Interconnection with side connection to substrate
FR3113324B1 (fr) * 2020-08-04 2024-05-24 Smart Packaging Solutions Module electronique pour carte contenant au moins une antenne et son procede de fabrication
KR102886403B1 (ko) * 2020-09-07 2025-11-17 엘지이노텍 주식회사 회로 기판 및 이를 포함하는 지문인식용 스마트 카드

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2716281B1 (fr) 1994-02-14 1996-05-03 Gemplus Card Int Procédé de fabrication d'une carte sans contact.
JPH08107123A (ja) 1994-10-04 1996-04-23 Hitachi Ltd 半導体集積回路装置の製造方法、その製造装置および半導体集積回路装置
FR2784210B1 (fr) * 1998-10-02 2001-09-14 Gemplus Card Int Carte a puce sans contact comportant des moyens d'inhibition
JP2002312746A (ja) * 2001-04-11 2002-10-25 Toshiba Corp Ｉｃモジュール及びその製造方法、並びに該ｉｃモジュールを装着した携帯可能電子装置
JP4422494B2 (ja) * 2003-05-07 2010-02-24 大日本印刷株式会社 Ｉｃカードおよびｓｉｍ
JP4996179B2 (ja) * 2006-08-31 2012-08-08 株式会社東芝 Ｉｃカード、及びｉｃカードの製造方法
JP2010072930A (ja) * 2008-09-18 2010-04-02 Toshiba Corp Ｉｃモジュール、及びこれを用いたｉｃカード
JP2011170525A (ja) 2010-02-17 2011-09-01 Toshiba Corp カード基材及びこのカード基材を有するｉｃカード
EP2420960A1 (fr) 2010-08-17 2012-02-22 Gemalto SA Procédé de fabrication d'un dispositif électronique comportant un module indémontable et dispositif obtenu
JP2012043341A (ja) 2010-08-23 2012-03-01 Toppan Printing Co Ltd Ｉｃモジュールおよびそれを用いたｉｃカード
US8640965B2 (en) * 2011-01-31 2014-02-04 American Bank Note Company Dual-interface smart card
EP2575086A1 (fr) * 2011-09-27 2013-04-03 Gemalto SA Procédé de connexion d'un microcircuit à des zones conductrices noyées dans un support
JP5990894B2 (ja) * 2011-11-17 2016-09-14 富士通セミコンダクター株式会社 半導体モジュール、半導体モジュールの製造方法及びカード
FR2998395B1 (fr) 2012-11-21 2016-01-01 Smart Packaging Solutions Sps Module electronique simple face pour carte a puce a double interface de communication
EP2736001A1 (fr) * 2012-11-27 2014-05-28 Gemalto SA Module électronique à interface de communication tridimensionnelle

Also Published As

Publication number Publication date
PL3059698T3 (pl) 2021-10-25
ZA201703296B (en) 2019-06-26
US10282652B2 (en) 2019-05-07
JP6453472B2 (ja) 2019-01-16
EP3869409A1 (fr) 2021-08-25
CA2968070C (fr) 2021-05-11
KR20170081693A (ko) 2017-07-12
KR102014621B1 (ko) 2019-08-26
JP2018505553A (ja) 2018-02-22
CN107111779A (zh) 2017-08-29
WO2016131682A1 (fr) 2016-08-25
BR112017015014A2 (pt) 2018-01-23
EP3059698A1 (fr) 2016-08-24
AU2016221971A1 (en) 2017-07-20
CN107111779B (zh) 2020-09-15
JP6756805B2 (ja) 2020-09-16
MX378922B (es) 2025-03-11
US20170372186A1 (en) 2017-12-28
AU2016221971B2 (en) 2019-01-31
SG11201703935TA (en) 2017-06-29
EP3059698B1 (fr) 2021-03-31
JP2019071435A (ja) 2019-05-09
ES2867102T3 (es) 2021-10-20
CA2968070A1 (fr) 2016-08-25

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