MY102308A - Hybrid printed circuit structures - Google Patents

Hybrid printed circuit structures

Info

Publication number
MY102308A
MY102308A MYPI87000928A MYPI19870928A MY102308A MY 102308 A MY102308 A MY 102308A MY PI87000928 A MYPI87000928 A MY PI87000928A MY PI19870928 A MYPI19870928 A MY PI19870928A MY 102308 A MY102308 A MY 102308A
Authority
MY
Malaysia
Prior art keywords
printed circuit
circuit structures
hybrid printed
wiring substrate
hybrid
Prior art date
Application number
MYPI87000928A
Other languages
English (en)
Inventor
Mikiya Kobayashi
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of MY102308A publication Critical patent/MY102308A/en

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/681—Shapes or dispositions thereof comprising holes not having chips therein, e.g. for outgassing, underfilling or bond wire passage
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Die Bonding (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
MYPI87000928A 1986-07-09 1987-07-01 Hybrid printed circuit structures MY102308A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986105213U JPH0735389Y2 (ja) 1986-07-09 1986-07-09 半導体装置

Publications (1)

Publication Number Publication Date
MY102308A true MY102308A (en) 1992-05-28

Family

ID=14401389

Family Applications (1)

Application Number Title Priority Date Filing Date
MYPI87000928A MY102308A (en) 1986-07-09 1987-07-01 Hybrid printed circuit structures

Country Status (3)

Country Link
JP (1) JPH0735389Y2 (mo)
KR (1) KR920005952Y1 (mo)
MY (1) MY102308A (mo)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002222914A (ja) * 2001-01-26 2002-08-09 Sony Corp 半導体装置及びその製造方法
JP4489137B1 (ja) * 2009-01-20 2010-06-23 パナソニック株式会社 回路モジュール及び電子機器

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5272468A (en) * 1975-12-15 1977-06-16 Matsushita Electric Industrial Co Ltd Printed circuit board
JPS629728Y2 (mo) * 1981-05-07 1987-03-06
JPS58150862U (ja) * 1982-04-01 1983-10-08 パイオニア株式会社 チツプ部品取付装置
JPS60114844U (ja) * 1984-01-10 1985-08-03 三菱電機株式会社 サ−マルヘツド
JPS6181140U (mo) * 1984-11-01 1986-05-29

Also Published As

Publication number Publication date
KR880003791U (ko) 1988-04-14
JPH0735389Y2 (ja) 1995-08-09
KR920005952Y1 (ko) 1992-08-27
JPS6310550U (mo) 1988-01-23

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