MY124460A - A package housing multiple semiconductor dies - Google Patents

A package housing multiple semiconductor dies

Info

Publication number
MY124460A
MY124460A MYPI96000858A MYPI19960858A MY124460A MY 124460 A MY124460 A MY 124460A MY PI96000858 A MYPI96000858 A MY PI96000858A MY PI19960858 A MYPI19960858 A MY PI19960858A MY 124460 A MY124460 A MY 124460A
Authority
MY
Malaysia
Prior art keywords
paddle
package housing
multiple semiconductor
housing multiple
semiconductor dies
Prior art date
Application number
MYPI96000858A
Inventor
A Kuhn Harry
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of MY124460A publication Critical patent/MY124460A/en

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R33/00—Coupling devices specially adapted for supporting apparatus and having one part acting as a holder providing support and electrical connection via a counterpart which is structurally associated with the apparatus, e.g. lamp holders; Separate parts thereof
    • H01R33/74—Devices having four or more poles, e.g. holders for compact fluorescent lamps
    • H01R33/76—Holders with sockets, clips, or analogous contacts adapted for axially-sliding engagement with parallely-arranged pins, blades, or analogous contacts on counterpart, e.g. electronic tube socket
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/464—Additional interconnections in combination with leadframes
    • H10W70/468—Circuit boards
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/811—Multiple chips on leadframes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/547—Dispositions of multiple bond wires
    • H10W72/5473—Dispositions of multiple bond wires multiple bond wires connected to a common bond pad
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5524—Materials of bond wires comprising metals or metalloids, e.g. silver comprising aluminium [Al]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/932—Plan-view shape, i.e. in top view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

A PACKAGE HOUSING MULTIPLE SEMICONDUCTOR DIE INCLUDES A LEADFRAME HAVING A PADDLE (20) AND A NUMBER OF LEAD FINGERS (21). A FLEXIBLE CIRCUIT (27) IS ADHESIVELY LAMINATED TO BOTH SIDES OF THE PADDLE (20). A FIRST SEMICONDUCTOR DIE (23) IS BACK -MOUNTED TO THE BOTTOM SURFACE OF THE PADDLE (20) AND WIRE-BONDED TO THE FLEXIBLE CIRCUIT (27) AND THE LEAD FINGERS (21). A SECOND SEMICONDUCTOR DIE IS BACK -MOUNTED TO THE TOP SURFACE OF THE PADDLE (20) AND TO THE FLEXIBLE CIRCUIT (27). THE DIES (22, 23) ARE ENCAPSULATED IN A SECURITY COATING AND ENCASED IN PLASTIC. (FIG.2)
MYPI96000858A 1995-03-13 1996-03-08 A package housing multiple semiconductor dies MY124460A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/402,933 US5719436A (en) 1995-03-13 1995-03-13 Package housing multiple semiconductor dies

Publications (1)

Publication Number Publication Date
MY124460A true MY124460A (en) 2006-06-30

Family

ID=23593865

Family Applications (1)

Application Number Title Priority Date Filing Date
MYPI96000858A MY124460A (en) 1995-03-13 1996-03-08 A package housing multiple semiconductor dies

Country Status (8)

Country Link
US (2) US5719436A (en)
EP (1) EP0815615B1 (en)
JP (1) JP3717937B2 (en)
KR (1) KR100272846B1 (en)
AU (1) AU5189596A (en)
DE (1) DE69632817T2 (en)
MY (1) MY124460A (en)
WO (1) WO1996028860A1 (en)

Families Citing this family (46)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR0137826B1 (en) * 1994-11-15 1998-04-28 문정환 Package method and device package
US7037426B2 (en) * 2000-05-04 2006-05-02 Zenon Environmental Inc. Immersed membrane apparatus
US5677567A (en) * 1996-06-17 1997-10-14 Micron Technology, Inc. Leads between chips assembly
US6037661A (en) * 1996-12-20 2000-03-14 International Business Machines Multichip module
US6054764A (en) * 1996-12-20 2000-04-25 Texas Instruments Incorporated Integrated circuit with tightly coupled passive components
JP3545200B2 (en) * 1997-04-17 2004-07-21 シャープ株式会社 Semiconductor device
JP3359846B2 (en) * 1997-07-18 2002-12-24 シャープ株式会社 Semiconductor device
US5990549A (en) * 1998-02-06 1999-11-23 Intel Corporation Thermal bus bar design for an electronic cartridge
JP3077668B2 (en) * 1998-05-01 2000-08-14 日本電気株式会社 Semiconductor device, lead frame for semiconductor device, and method of manufacturing the same
GB2341482B (en) * 1998-07-30 2003-07-09 Bookham Technology Ltd Lead frame attachment for integrated optoelectronic waveguide device
SG88741A1 (en) * 1998-09-16 2002-05-21 Texas Instr Singapore Pte Ltd Multichip assembly semiconductor
US6049465A (en) * 1998-09-25 2000-04-11 Advanced Micro Devices, Inc. Signal carrying means including a carrier substrate and wire bonds for carrying signals between the cache and logic circuitry of a microprocessor
JP3886659B2 (en) * 1999-01-13 2007-02-28 東芝マイクロエレクトロニクス株式会社 Semiconductor device
JP3847997B2 (en) 1999-01-22 2006-11-22 東芝マイクロエレクトロニクス株式会社 Semiconductor device and double-sided MCP chip
US6890798B2 (en) 1999-06-08 2005-05-10 Intel Corporation Stacked chip packaging
US6229219B1 (en) * 2000-03-29 2001-05-08 Advanced Micro Devices, Inc. Flip chip package compatible with multiple die footprints and method of assembling the same
US6552910B1 (en) 2000-06-28 2003-04-22 Micron Technology, Inc. Stacked-die assemblies with a plurality of microelectronic devices and methods of manufacture
US6560117B2 (en) 2000-06-28 2003-05-06 Micron Technology, Inc. Packaged microelectronic die assemblies and methods of manufacture
US6525413B1 (en) 2000-07-12 2003-02-25 Micron Technology, Inc. Die to die connection method and assemblies and packages including dice so connected
US7298031B1 (en) * 2000-08-09 2007-11-20 Micron Technology, Inc. Multiple substrate microelectronic devices and methods of manufacture
US6607937B1 (en) 2000-08-23 2003-08-19 Micron Technology, Inc. Stacked microelectronic dies and methods for stacking microelectronic dies
US6858922B2 (en) * 2001-01-19 2005-02-22 International Rectifier Corporation Back-to-back connected power semiconductor device package
US20040080056A1 (en) * 2001-03-30 2004-04-29 Lim David Chong Sook Packaging system for die-up connection of a die-down oriented integrated circuit
US6891257B2 (en) * 2001-03-30 2005-05-10 Fairchild Semiconductor Corporation Packaging system for die-up connection of a die-down oriented integrated circuit
US6906415B2 (en) * 2002-06-27 2005-06-14 Micron Technology, Inc. Semiconductor device assemblies and packages including multiple semiconductor devices and methods
US7573136B2 (en) * 2002-06-27 2009-08-11 Micron Technology, Inc. Semiconductor device assemblies and packages including multiple semiconductor device components
US7132311B2 (en) * 2002-07-26 2006-11-07 Intel Corporation Encapsulation of a stack of semiconductor dice
JP3846437B2 (en) * 2003-03-17 2006-11-15 株式会社日立製作所 Automotive control unit
US7057116B2 (en) * 2003-06-02 2006-06-06 Intel Corporation Selective reference plane bridge(s) on folded package
TW200501358A (en) * 2003-06-20 2005-01-01 Macronix Int Co Ltd Stacking dual-chip packaging structure
US7368320B2 (en) * 2003-08-29 2008-05-06 Micron Technology, Inc. Method of fabricating a two die semiconductor assembly
US8468337B2 (en) * 2004-03-02 2013-06-18 International Business Machines Corporation Secure data transfer over a network
US7564976B2 (en) * 2004-03-02 2009-07-21 International Business Machines Corporation System and method for performing security operations on network data
US20050245062A1 (en) * 2004-04-29 2005-11-03 Jeff Kingsbury Single row bond pad arrangement
US7816182B2 (en) * 2004-11-30 2010-10-19 Stmicroelectronics Asia Pacific Pte. Ltd. Simplified multichip packaging and package design
TWI262564B (en) * 2005-04-29 2006-09-21 Holtek Semiconductor Inc Multi-functional chip construction
KR100631959B1 (en) * 2005-09-07 2006-10-04 주식회사 하이닉스반도체 Multilayer semiconductor package and manufacturing method thereof
US7816778B2 (en) * 2007-02-20 2010-10-19 Micron Technology, Inc. Packaged IC device comprising an embedded flex circuit on leadframe, and methods of making same
JP2009038142A (en) * 2007-07-31 2009-02-19 Elpida Memory Inc Semiconductor stacked package
JP2009295959A (en) * 2008-05-09 2009-12-17 Panasonic Corp Semiconductor device, and method for manufacturing thereof
US9704831B2 (en) * 2010-05-21 2017-07-11 Mitsubishi Electric Corporation Power semiconductor module
TWI406376B (en) * 2010-06-15 2013-08-21 力成科技股份有限公司 Chip package construction
US8951847B2 (en) 2012-01-18 2015-02-10 Intersil Americas LLC Package leadframe for dual side assembly
KR101718321B1 (en) * 2014-12-23 2017-03-21 인텔 코포레이션 Integrated package design with wire leads for package-on-package product
US11328984B2 (en) * 2017-12-29 2022-05-10 Texas Instruments Incorporated Multi-die integrated circuit packages and methods of manufacturing the same
US11088055B2 (en) * 2018-12-14 2021-08-10 Texas Instruments Incorporated Package with dies mounted on opposing surfaces of a leadframe

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63107149A (en) * 1986-10-24 1988-05-12 Hitachi Ltd Multi-chip module
JPS63244654A (en) * 1987-03-31 1988-10-12 Toshiba Corp Plastic molded type integrated circuit device
FR2619959B1 (en) * 1987-08-31 1991-06-14 Thomson Semiconducteurs LIGHT DETECTION CIRCUIT
JP2522524B2 (en) * 1988-08-06 1996-08-07 株式会社東芝 Method for manufacturing semiconductor device
JPH02105446A (en) * 1988-10-13 1990-04-18 Nec Corp hybrid integrated circuit
JPH02201948A (en) * 1989-01-30 1990-08-10 Toshiba Corp Package of semiconductor device
JPH03105952A (en) * 1989-09-19 1991-05-02 Nec Kyushu Ltd Surface-mounting type semiconductor device
US5012323A (en) * 1989-11-20 1991-04-30 Micron Technology, Inc. Double-die semiconductor package having a back-bonded die and a face-bonded die interconnected on a single leadframe
US5019893A (en) * 1990-03-01 1991-05-28 Motorola, Inc. Single package, multiple, electrically isolated power semiconductor devices
JPH0439955A (en) * 1990-06-05 1992-02-10 Mitsubishi Electric Corp Semiconductor device
JPH0449650A (en) * 1990-06-19 1992-02-19 Oki Electric Ind Co Ltd Mold package type hybrid ic
US5053992A (en) * 1990-10-04 1991-10-01 General Instrument Corporation Prevention of inspection of secret data stored in encapsulated integrated circuit chip
JP2593956B2 (en) * 1990-10-18 1997-03-26 シャープ株式会社 High threshold voltage method for insulated gate field effect transistor
JPH04155856A (en) * 1990-10-18 1992-05-28 Hitachi Ltd Hybrid integrated circuit device and manufacture thereof
JPH0536893A (en) * 1991-08-02 1993-02-12 Nec Corp Hybrid integrated circuit
JPH05136303A (en) * 1991-11-08 1993-06-01 Nec Corp Heat sink for electronic devices
JP2843464B2 (en) * 1992-09-01 1999-01-06 シャープ株式会社 Solid-state imaging device
US5615475A (en) * 1995-01-30 1997-04-01 Staktek Corporation Method of manufacturing an integrated package having a pair of die on a common lead frame

Also Published As

Publication number Publication date
DE69632817D1 (en) 2004-08-05
AU5189596A (en) 1996-10-02
WO1996028860A1 (en) 1996-09-19
EP0815615B1 (en) 2004-06-30
KR100272846B1 (en) 2000-11-15
EP0815615A4 (en) 2000-12-06
JP3717937B2 (en) 2005-11-16
JPH11502063A (en) 1999-02-16
DE69632817T2 (en) 2005-07-14
US5793101A (en) 1998-08-11
EP0815615A1 (en) 1998-01-07
KR19980702651A (en) 1998-08-05
US5719436A (en) 1998-02-17

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