MY131241A - Virtual to physical memory address mapping within a system having a secure domain and a non-secure domain - Google Patents
Virtual to physical memory address mapping within a system having a secure domain and a non-secure domainInfo
- Publication number
- MY131241A MY131241A MYPI20034398A MY131241A MY 131241 A MY131241 A MY 131241A MY PI20034398 A MYPI20034398 A MY PI20034398A MY 131241 A MY131241 A MY 131241A
- Authority
- MY
- Malaysia
- Prior art keywords
- secure
- secure domain
- domain
- mode
- processor
- Prior art date
Links
- 238000013507 mapping Methods 0.000 title abstract 3
- PWPJGUXAGUPAHP-UHFFFAOYSA-N lufenuron Chemical compound C1=C(Cl)C(OC(F)(F)C(C(F)(F)F)F)=CC(Cl)=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F PWPJGUXAGUPAHP-UHFFFAOYSA-N 0.000 abstract 2
Landscapes
- Storage Device Security (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Abstract
THERE IS PROVIDED APPARATUS FOR PROCESSING DATA, SAID APPARATUS COMPRISING: A PROCESSOR (10) OPERABLE IN A PLURALITY OF MODES (A, B, C, 1, 2, 3, 4) AND EITHER A SECURE DOMAIN (S) OR A NON-SECURE DOMAIN (NS) INCLUDING: AT LEAST ONE SECURE MODE (A, B, C) BEING A MODE IN SAID SECURE DOMAIN (S); AND AT LEAST ONE NON-SECURE MODE (1, 2, 3, 4) BEING A MODE IN SAID NON-SECURE DOMAIN (NS); WHEREIN WHEN SAID PROCESSOR (10) IS EXECUTING A PROGRAM IN A SECURE MODE (S) SAID PROGRAM HAS ACCESS TO SECURE DATA WHICH IS NOT ACCESSIBLE WHEN SAID PROCESSOR (10) IS OPERATING IN A NON-SECURE MODE (NS); SAID PROCESSOR (10) INCLUDES A NON-SECURE TRANSLATION TABLE BASE ADDRESS REGISTER OPERABLE IN SAID NON-SECURE DOMAIN TO INDICATE A REGION OF MEMORY STORING NON-SECURE DOMAIN MEMORY MAPPING DATA DEFINING HOW VIRTUAL ADDRESSES ARE TRANSLATED TO PHYSICAL ADDRESSES WITHIN SAID NONSECURE DOMAIN (NS); AND SAID PROCESSOR INCLUDES A SECURE TRANSLATION TABLE BASE ADDRESS REGISTER OPERABLE IN SAID SECURE DOMAIN TO INDICATE A REGION OF MEMORY STORING SECURE DOMAIN MEMORY MAPPING DATA DEFINING HOW VIRTUAL ADDRESSES ARE TRANSLATED TO PHYSICAL ADDRESSES WITHIN SAID SECURE DOMAIN (S).(FIG 1)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB0226906A GB0226906D0 (en) | 2002-11-18 | 2002-11-18 | Virtual to physical memory address mapping within a system having a secure domain and a non-secure domain |
| GB0303449A GB0303449D0 (en) | 2002-11-18 | 2003-02-14 | Task following between multiple operating systems |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| MY131241A true MY131241A (en) | 2007-07-31 |
Family
ID=9948070
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| MYPI20034398 MY131241A (en) | 2002-11-18 | 2003-11-17 | Virtual to physical memory address mapping within a system having a secure domain and a non-secure domain |
Country Status (4)
| Country | Link |
|---|---|
| CN (1) | CN100350388C (en) |
| GB (1) | GB0226906D0 (en) |
| IL (1) | IL167597A (en) |
| MY (1) | MY131241A (en) |
Families Citing this family (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2440968B (en) * | 2006-08-16 | 2011-02-02 | Advanced Risc Mach Ltd | Protecting system control registers in a data processing apparatus |
| CN102521166B (en) * | 2011-12-05 | 2015-02-11 | 晶门科技(深圳)有限公司 | Information safety coprocessor and method for managing internal storage space in information safety coprocessor |
| US9116711B2 (en) | 2012-02-08 | 2015-08-25 | Arm Limited | Exception handling in a data processing apparatus having a secure domain and a less secure domain |
| US9477834B2 (en) | 2012-02-08 | 2016-10-25 | Arm Limited | Maintaining secure data isolated from non-secure access when switching between domains |
| US9213828B2 (en) | 2012-02-08 | 2015-12-15 | Arm Limited | Data processing apparatus and method for protecting secure data and program code from non-secure access when switching between secure and less secure domains |
| CN103455426B (en) * | 2012-05-28 | 2018-08-10 | 联想(北京)有限公司 | Data processing method and device |
| GB2520061B (en) * | 2013-11-08 | 2016-02-24 | Exacttrak Ltd | Data accessibility control |
| US10102391B2 (en) * | 2015-08-07 | 2018-10-16 | Qualcomm Incorporated | Hardware enforced content protection for graphics processing units |
| KR102429906B1 (en) * | 2015-10-13 | 2022-08-05 | 삼성전자주식회사 | Storage device, Host communicating with the storage device, and Electronic device including the storage device |
| CN105760776A (en) * | 2016-02-04 | 2016-07-13 | 联想(北京)有限公司 | Data processing method and electronic equipment |
| CN107665175A (en) * | 2016-07-27 | 2018-02-06 | 展讯通信(上海)有限公司 | The method, apparatus and electronic equipment of memory partition isolation |
| CN108052415B (en) * | 2017-11-17 | 2022-01-04 | 中国科学院信息工程研究所 | Rapid recovery method and system for malicious software detection platform |
| US11481241B2 (en) | 2018-08-30 | 2022-10-25 | Micron Technology, Inc. | Virtual machine register in a computer processor |
| US11182507B2 (en) * | 2018-08-30 | 2021-11-23 | Micron Technology, Inc. | Domain crossing in executing instructions in computer processors |
| AT521713B1 (en) * | 2018-10-11 | 2023-07-15 | Avl List Gmbh | Procedure for detecting security-relevant data flows |
| GB2580968B (en) * | 2019-02-01 | 2021-08-04 | Advanced Risc Mach Ltd | Lookup circuitry for secure and non-secure storage |
| US11620217B2 (en) * | 2021-03-31 | 2023-04-04 | Arm Limited | Partition identifier space selection |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6349355B1 (en) * | 1997-02-06 | 2002-02-19 | Microsoft Corporation | Sharing executable modules between user and kernel threads |
| CA2395645A1 (en) * | 1999-12-23 | 2001-06-28 | General Instrument Corporation | Dual-mode processor |
| CN1120420C (en) * | 2000-12-15 | 2003-09-03 | 智原科技股份有限公司 | Apparatus and method for processing exception process using software control for processor |
-
2002
- 2002-11-18 GB GB0226906A patent/GB0226906D0/en not_active Ceased
-
2003
- 2003-10-27 CN CNB2003801035101A patent/CN100350388C/en not_active Expired - Lifetime
- 2003-11-17 MY MYPI20034398 patent/MY131241A/en unknown
-
2005
- 2005-03-22 IL IL167597A patent/IL167597A/en active IP Right Grant
Also Published As
| Publication number | Publication date |
|---|---|
| CN1711525A (en) | 2005-12-21 |
| IL167597A (en) | 2010-05-31 |
| GB0226906D0 (en) | 2002-12-24 |
| CN100350388C (en) | 2007-11-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| WO2004046738A3 (en) | Virtual to physical memory address mapping within a system having a secure domain and a non-secure domain | |
| MY131241A (en) | Virtual to physical memory address mapping within a system having a secure domain and a non-secure domain | |
| KR930009062B1 (en) | Computing device with virtual memory device | |
| US7383374B2 (en) | Method and apparatus for managing virtual addresses | |
| US9298642B2 (en) | Sharing address translation between CPU and peripheral devices | |
| US5852738A (en) | Method and apparatus for dynamically controlling address space allocation | |
| TW376488B (en) | Virtual memory system with local and global virtual address translation | |
| US8706942B2 (en) | Direct memory access (DMA) address translation between peer-to-peer input/output (I/O) devices | |
| MY140184A (en) | Switching between secure and non-secure processing modes | |
| TW200634551A (en) | Method and system for a guest physical address virtualization in a virtual machine environment | |
| GB2378277B (en) | Multiple address translations | |
| US20070239960A1 (en) | Data processor and IP module for data processor | |
| TW200502679A (en) | Access request for a data processing system having no system memory | |
| WO2009094163A3 (en) | Alternate address space to permit virtual machine monitor access to guest virtual address space | |
| ATE493709T1 (en) | MICROPROCESSOR SYSTEM | |
| DK59487D0 (en) | STORES FOR A DATA PROCESSING UNIT | |
| JP2005509946A (en) | Memory management system and memory access security grant method based on linear address | |
| JP2016042351A (en) | Dynamic memory address remapping in computing systems | |
| TW200630797A (en) | System and method for virtualization of processor resources | |
| JPH10187538A5 (en) | ||
| TW200713034A (en) | Preventing multiple translation lookaside buffer accesses for a same page in memory | |
| GB2436249A (en) | Translation lookaside buffer for simultaneous multi-thread processing | |
| US20250315377A1 (en) | Hybrid-paging | |
| ATE373267T1 (en) | MODIFIED HARVARD ARCHITECTURE PROCESSOR, WITH PROGRAM MEMORY MAPLED DATA MEMORY AND PROTECTION AGAINST ERROR EXECUTION | |
| JPH01108651A (en) | Work station |