MY172620A - System and method for arbitrary bit pemutation using bit-separation and bit-distribution instructions - Google Patents

System and method for arbitrary bit pemutation using bit-separation and bit-distribution instructions

Info

Publication number
MY172620A
MY172620A MYPI2014000196A MYPI2014000196A MY172620A MY 172620 A MY172620 A MY 172620A MY PI2014000196 A MYPI2014000196 A MY PI2014000196A MY PI2014000196 A MYPI2014000196 A MY PI2014000196A MY 172620 A MY172620 A MY 172620A
Authority
MY
Malaysia
Prior art keywords
bit
bits
arbitrary
separation
pemutation
Prior art date
Application number
MYPI2014000196A
Inventor
Binti Mohamad Yassin Yaszrina
Yusri Mohamad Yusof Mohamad
Original Assignee
Mimos Berhad
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mimos Berhad filed Critical Mimos Berhad
Priority to MYPI2014000196A priority Critical patent/MY172620A/en
Priority to PCT/MY2015/000006 priority patent/WO2015112001A1/en
Publication of MY172620A publication Critical patent/MY172620A/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/76—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30018—Bit or string instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30032—Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G06F9/30038—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations using a mask

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Debugging And Monitoring (AREA)
  • Advance Control (AREA)

Abstract

The embodiments herein disclose a system (1103) and method for arbitrary bit permutation. According to one embodiment a method involving log2(n) instances of bit distribution (BDST) instruction and in another embodiment involving log2(n) instances of bit separation (BSEP) instructions to perform an arbitrary bit permutation on a programmable processor (1101) is disclosed. In one instance of the embodiment, the permute instruction separates selected bits to one side in order and unselected bits to the other side in reverse order and in an another instance of the embodiment, the permute instruction distributes sequence of bits from one side to selected bit positions in order and sequence of bits from the other side to unselected bit positions in reverse order. Most illustrative diagram: Figure 1
MYPI2014000196A 2014-01-22 2014-01-22 System and method for arbitrary bit pemutation using bit-separation and bit-distribution instructions MY172620A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
MYPI2014000196A MY172620A (en) 2014-01-22 2014-01-22 System and method for arbitrary bit pemutation using bit-separation and bit-distribution instructions
PCT/MY2015/000006 WO2015112001A1 (en) 2014-01-22 2015-01-22 System and method for arbitrary bit permutation using bit-separation and bit-distribution instructions

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
MYPI2014000196A MY172620A (en) 2014-01-22 2014-01-22 System and method for arbitrary bit pemutation using bit-separation and bit-distribution instructions

Publications (1)

Publication Number Publication Date
MY172620A true MY172620A (en) 2019-12-06

Family

ID=52727346

Family Applications (1)

Application Number Title Priority Date Filing Date
MYPI2014000196A MY172620A (en) 2014-01-22 2014-01-22 System and method for arbitrary bit pemutation using bit-separation and bit-distribution instructions

Country Status (2)

Country Link
MY (1) MY172620A (en)
WO (1) WO2015112001A1 (en)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6952478B2 (en) * 2000-05-05 2005-10-04 Teleputers, Llc Method and system for performing permutations using permutation instructions based on modified omega and flip stages
WO2001089098A2 (en) * 2000-05-05 2001-11-22 Lee Ruby B A method and system for performing permutations with bit permutation instructions
MY174802A (en) * 2011-07-12 2020-05-15 Mimos Berhad Apparatus and method of performing bit separation

Also Published As

Publication number Publication date
WO2015112001A1 (en) 2015-07-30

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