MY181531A - Method of fabricating a bond pad in a semiconductor device - Google Patents

Method of fabricating a bond pad in a semiconductor device

Info

Publication number
MY181531A
MY181531A MYPI2013700121A MYPI2013700121A MY181531A MY 181531 A MY181531 A MY 181531A MY PI2013700121 A MYPI2013700121 A MY PI2013700121A MY PI2013700121 A MYPI2013700121 A MY PI2013700121A MY 181531 A MY181531 A MY 181531A
Authority
MY
Malaysia
Prior art keywords
etching
bond pad
fabricating
layer
semiconductor device
Prior art date
Application number
MYPI2013700121A
Inventor
Fairuz Amir Mohammad
Man Mazlin
Ramdzan Buyong Muhammad
Kamariah Wan Sabli Sharaifah
Mohd Zain Azlina
Original Assignee
Mimos Berhad
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mimos Berhad filed Critical Mimos Berhad
Priority to MYPI2013700121A priority Critical patent/MY181531A/en
Priority to PCT/MY2014/000007 priority patent/WO2014112864A1/en
Publication of MY181531A publication Critical patent/MY181531A/en

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00—Cleaning of wafers, substrates or parts of devices
    • H10P70/20—Cleaning during device manufacture
    • H10P70/23—Cleaning during device manufacture during, before or after processing of insulating materials
    • H10P70/234—Cleaning during device manufacture during, before or after processing of insulating materials the processing being the formation of vias or contact holes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/26—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials
    • H10P50/264—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means
    • H10P50/266—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only
    • H10P50/267—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only using plasmas
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/286—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials
    • H10P50/287—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/59—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/9415—Dispositions of bond pads relative to the surface, e.g. recessed, protruding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/131—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
    • H10W74/137—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed the encapsulations being directly on the semiconductor body
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/40—Encapsulations, e.g. protective coatings characterised by their materials
    • H10W74/43—Encapsulations, e.g. protective coatings characterised by their materials comprising oxides, nitrides or carbides, e.g. ceramics or glasses

Landscapes

  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

In fabricating a bond pad in a semiconductor device, the silicon nitride and silicon dioxide layers are separately etched using fluorine-based plasma in a reactive ion etching process chamber. Each layer?s recipe is customized, instead of using the same recipe or parameters for both layers as conventionally practiced, so that the initial undercut structure is prevented from forming and growing into the undesirable trench on the surface of the nitride layer. Next, solvent cleaning process is done after the etching so that the unwanted polymers formed during the etching may be removed. The remaining photoresist is then removed using a microwave oxygen plasma ashing method. The last layer, TiN ARC, is then removed using a chlorine-based plasma in a reactive ion etch process chamber. Finally, the exposed metal bond pad surface is cleaned with a solvent-free cleaning agent to remove the unwanted residues and by-products from the TiN ARC etching to avoid pitting corrosion of the metal surface. Most illustrative drawing: FIGURE 5
MYPI2013700121A 2013-01-18 2013-01-18 Method of fabricating a bond pad in a semiconductor device MY181531A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
MYPI2013700121A MY181531A (en) 2013-01-18 2013-01-18 Method of fabricating a bond pad in a semiconductor device
PCT/MY2014/000007 WO2014112864A1 (en) 2013-01-18 2014-01-16 Method of fabricating a bond pad in a semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
MYPI2013700121A MY181531A (en) 2013-01-18 2013-01-18 Method of fabricating a bond pad in a semiconductor device

Publications (1)

Publication Number Publication Date
MY181531A true MY181531A (en) 2020-12-25

Family

ID=50434251

Family Applications (1)

Application Number Title Priority Date Filing Date
MYPI2013700121A MY181531A (en) 2013-01-18 2013-01-18 Method of fabricating a bond pad in a semiconductor device

Country Status (2)

Country Link
MY (1) MY181531A (en)
WO (1) WO2014112864A1 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
MY161431A (en) * 2013-10-07 2017-04-14 Mimos Berhad A method for eliminating aluminium surface defects
CN114388360A (en) * 2022-01-12 2022-04-22 澳芯集成电路技术(广东)有限公司 Method for removing polymer in aluminum liner etching
CN119890046B (en) * 2024-12-26 2026-02-24 杭州富芯半导体有限公司 Semiconductor device fabrication methods and semiconductor devices

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2593965B2 (en) 1991-01-29 1997-03-26 三菱電機株式会社 Semiconductor device
US5960306A (en) * 1995-12-15 1999-09-28 Motorola, Inc. Process for forming a semiconductor device
JP3526376B2 (en) 1996-08-21 2004-05-10 株式会社東芝 Semiconductor device and manufacturing method thereof
US6006764A (en) * 1997-01-28 1999-12-28 Taiwan Semiconductor Manufacturing Company, Ltd. Method of stripping photoresist from Al bonding pads that prevents corrosion
JP3603296B2 (en) 1997-11-11 2004-12-22 ソニー株式会社 Method for manufacturing semiconductor device
US6001538A (en) 1998-04-06 1999-12-14 Taiwan Semiconductor Manufacturing Company Ltd. Damage free passivation layer etching process
US5985765A (en) 1998-05-11 1999-11-16 Taiwan Semiconductor Manufacturing Company, Ltd. Method for reducing bonding pad loss using a capping layer when etching bonding pad passivation openings
SG77710A1 (en) 1998-09-09 2001-01-16 Tokuyama Corp Photoresist ashing residue cleaning agent
JP2974022B1 (en) 1998-10-01 1999-11-08 ヤマハ株式会社 Bonding pad structure of semiconductor device
TW399264B (en) * 1998-11-27 2000-07-21 United Microelectronics Corp Method for reducing the fluorine content on metal pad surface
US6355576B1 (en) * 1999-04-26 2002-03-12 Vlsi Technology Inc. Method for cleaning integrated circuit bonding pads
KR100591146B1 (en) * 2003-07-11 2006-06-19 동부일렉트로닉스 주식회사 Semiconductor Device and Bonding Pad Formation Method
US7494928B2 (en) 2005-09-20 2009-02-24 Taiwan Semiconductor Manufacturing Co., Ltd. Method for patterning and etching a passivation layer
US7585754B2 (en) * 2008-01-10 2009-09-08 Winbond Electronics Corp. Method of forming bonding pad opening
US8207052B2 (en) * 2009-01-16 2012-06-26 Globalfoundries Singapore Pte. Ltd. Method to prevent corrosion of bond pad structure

Also Published As

Publication number Publication date
WO2014112864A1 (en) 2014-07-24

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