MY188501A - Method of forming graphene bump structure - Google Patents

Method of forming graphene bump structure

Info

Publication number
MY188501A
MY188501A MYPI2018002936A MYPI2018002936A MY188501A MY 188501 A MY188501 A MY 188501A MY PI2018002936 A MYPI2018002936 A MY PI2018002936A MY PI2018002936 A MYPI2018002936 A MY PI2018002936A MY 188501 A MY188501 A MY 188501A
Authority
MY
Malaysia
Prior art keywords
substrate
bump structure
graphene
epoxy
metal catalyst
Prior art date
Application number
MYPI2018002936A
Inventor
Hing Wah Lee
Mai Woon Lee
Aniq Shazni Bin Mohammad Haniff Muhammad
Halim Bin Adom Abdul
Binti Soriadi Nurhidaya
Original Assignee
Mimos Berhad
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mimos Berhad filed Critical Mimos Berhad
Priority to MYPI2018002936A priority Critical patent/MY188501A/en
Priority to PCT/MY2019/050132 priority patent/WO2020139077A1/en
Publication of MY188501A publication Critical patent/MY188501A/en

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2924—Structures
    • H10P14/2925—Surface structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/881—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being a two-dimensional material
    • H10D62/882—Graphene
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3202—Materials thereof
    • H10P14/3238—Materials thereof being insulating materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3202—Materials thereof
    • H10P14/3241—Materials thereof being conductive materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3242—Structure
    • H10P14/3244—Layer structure
    • H10P14/3248—Layer structure consisting of two layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3406—Carbon, e.g. diamond-like carbon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/36—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done before the formation of the materials

Landscapes

  • Carbon And Carbon Compounds (AREA)

Abstract

The present invention relates to a method (200) of forming graphene bump structure (100) comprising the steps of providing (210) a substrate (1 0); etching (220) the substrate (10) to form a cavity structure (20); growing (230) a silicon dioxide layer (30) on top of the substrate (10); depositing (240) a thin metal catalyst layer (40) on top of the substrate (30); synthesizing (250) graphene layer (50) on top of the metal catalyst layer (40); depositing (260) an epoxy-based photoresist (60); removing (270) the thin metal catalyst layer (40), the silicon dioxide layer (30) and the epoxy-based photoresist (60) from the substrate (1 0); and patterning (280) the epoxy-based photoresist (60) to remove from the cavity structure (20) to form the graphene bump structure (100). Drawing accompanying abstract: Figure 2.
MYPI2018002936A 2018-12-26 2018-12-26 Method of forming graphene bump structure MY188501A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
MYPI2018002936A MY188501A (en) 2018-12-26 2018-12-26 Method of forming graphene bump structure
PCT/MY2019/050132 WO2020139077A1 (en) 2018-12-26 2019-12-26 Method of forming graphene bump structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
MYPI2018002936A MY188501A (en) 2018-12-26 2018-12-26 Method of forming graphene bump structure

Publications (1)

Publication Number Publication Date
MY188501A true MY188501A (en) 2021-12-16

Family

ID=71127381

Family Applications (1)

Application Number Title Priority Date Filing Date
MYPI2018002936A MY188501A (en) 2018-12-26 2018-12-26 Method of forming graphene bump structure

Country Status (2)

Country Link
MY (1) MY188501A (en)
WO (1) WO2020139077A1 (en)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101219769B1 (en) * 2009-08-18 2013-01-18 세종대학교산학협력단 Carbon nanostructured material pattern and manufacturing method of the same, and carbon nanostructured material thin film transistor and manufacturing method of the same
JP6680678B2 (en) * 2013-09-16 2020-04-15 ユニバーシティ オブ テクノロジー シドニー Method for forming graphene layer on silicon carbide
KR101564038B1 (en) * 2014-02-11 2015-10-29 광주과학기술원 Method for direct growth of patterned graphene
US10347791B2 (en) * 2015-07-13 2019-07-09 Crayonano As Nanowires or nanopyramids grown on graphitic substrate
KR101687313B1 (en) * 2015-11-06 2016-12-16 한국과학기술원 Method and board for growing high quality graphene layer using high pressure annealing

Also Published As

Publication number Publication date
WO2020139077A1 (en) 2020-07-02

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