NL6606453A - - Google Patents

Info

Publication number
NL6606453A
NL6606453A NL6606453A NL6606453A NL6606453A NL 6606453 A NL6606453 A NL 6606453A NL 6606453 A NL6606453 A NL 6606453A NL 6606453 A NL6606453 A NL 6606453A NL 6606453 A NL6606453 A NL 6606453A
Authority
NL
Netherlands
Application number
NL6606453A
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of NL6606453A publication Critical patent/NL6606453A/xx

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/69Etching of wafers, substrates or parts of devices using masks for semiconductor materials
    • H10P50/691Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/611Combinations of BJTs and one or more of diodes, resistors or capacitors
    • H10D84/613Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
    • H10D84/615Combinations of vertical BJTs and one or more of resistors or capacitors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01Manufacture or treatment
    • H10W10/011Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/019Manufacture or treatment of isolation regions comprising dielectric materials using epitaxial passivated integrated circuit [EPIC] processes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10Isolation regions comprising dielectric materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/01Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/40Encapsulations, e.g. protective coatings characterised by their materials
    • H10W74/47Encapsulations, e.g. protective coatings characterised by their materials comprising organic materials, e.g. plastics or resins
    • H10W74/473Encapsulations, e.g. protective coatings characterised by their materials comprising organic materials, e.g. plastics or resins containing a filler
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/043Dual dielectric
NL6606453A 1965-05-11 1966-05-11 NL6606453A (th)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DES0097037 1965-05-11

Publications (1)

Publication Number Publication Date
NL6606453A true NL6606453A (th) 1966-11-14

Family

ID=7520460

Family Applications (1)

Application Number Title Priority Date Filing Date
NL6606453A NL6606453A (th) 1965-05-11 1966-05-11

Country Status (7)

Country Link
US (1) US3466741A (th)
AT (1) AT262381B (th)
CH (1) CH455052A (th)
DE (1) DE1514460A1 (th)
GB (1) GB1142816A (th)
NL (1) NL6606453A (th)
SE (1) SE315661B (th)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL6714336A (th) * 1967-10-21 1969-04-23
US3947952A (en) * 1970-12-28 1976-04-06 Bell Telephone Laboratories, Incorporated Method of encapsulating beam lead semiconductor devices
US3660732A (en) * 1971-02-08 1972-05-02 Signetics Corp Semiconductor structure with dielectric and air isolation and method
US4587719A (en) * 1983-08-01 1986-05-13 The Board Of Trustees Of The Leland Stanford Junior University Method of fabrication of long arrays using a short substrate
US4815208A (en) * 1987-05-22 1989-03-28 Texas Instruments Incorporated Method of joining substrates for planar electrical interconnections of hybrid circuits
US5874346A (en) * 1996-05-23 1999-02-23 Advanced Micro Devices, Inc. Subtrench conductor formation with large tilt angle implant
US6182342B1 (en) 1999-04-02 2001-02-06 Andersen Laboratories, Inc. Method of encapsulating a saw device

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3079254A (en) * 1959-01-26 1963-02-26 George W Crowley Photographic fabrication of semiconductor devices
US3158788A (en) * 1960-08-15 1964-11-24 Fairchild Camera Instr Co Solid-state circuitry having discrete regions of semi-conductor material isolated by an insulating material
US3206647A (en) * 1960-10-31 1965-09-14 Sprague Electric Co Semiconductor unit
DE1188731B (de) * 1961-03-17 1965-03-11 Intermetall Verfahren zum gleichzeitigen Herstellen von mehreren Halbleiteranordnungen
US3300832A (en) * 1963-06-28 1967-01-31 Rca Corp Method of making composite insulatorsemiconductor wafer
US3290753A (en) * 1963-08-19 1966-12-13 Bell Telephone Labor Inc Method of making semiconductor integrated circuit elements
US3307239A (en) * 1964-02-18 1967-03-07 Bell Telephone Labor Inc Method of making integrated semiconductor devices

Also Published As

Publication number Publication date
GB1142816A (en) 1969-02-12
SE315661B (th) 1969-10-06
US3466741A (en) 1969-09-16
AT262381B (de) 1968-06-10
DE1514460A1 (de) 1969-05-22
CH455052A (de) 1968-04-30

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