NL7003326A - - Google Patents
Info
- Publication number
- NL7003326A NL7003326A NL7003326A NL7003326A NL7003326A NL 7003326 A NL7003326 A NL 7003326A NL 7003326 A NL7003326 A NL 7003326A NL 7003326 A NL7003326 A NL 7003326A NL 7003326 A NL7003326 A NL 7003326A
- Authority
- NL
- Netherlands
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/14—Digital recording or reproducing using self-clocking codes
- G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
- G11B20/1407—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol
- G11B20/1419—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol to or from biphase level coding, i.e. to or from codes where a one is coded as a transition from a high to a low level during the middle of a bit cell and a zero is encoded as a transition from a low to a high level during the middle of a bit cell or vice versa, e.g. split phase code, Manchester code conversion to or from biphase space or mark coding, i.e. to or from codes where there is a transition at the beginning of every bit cell and a one has no second transition and a zero has a second transition one half of a bit period later or vice versa, e.g. double frequency code, FM code
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Pulse Circuits (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19691913672 DE1913672C (de) | 1969-03-18 | Schaltungsanordnung zur Unterdrückung von Störimpulsen |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| NL7003326A true NL7003326A (fr) | 1970-09-22 |
Family
ID=5728492
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| NL7003326A NL7003326A (fr) | 1969-03-18 | 1970-03-09 |
Country Status (5)
| Country | Link |
|---|---|
| BE (1) | BE747567A (fr) |
| FR (1) | FR2038902A5 (fr) |
| GB (1) | GB1297699A (fr) |
| LU (1) | LU60528A1 (fr) |
| NL (1) | NL7003326A (fr) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4152731A (en) * | 1977-12-20 | 1979-05-01 | Motorola, Inc. | Read circuit for distinguishing false peaks in an alternating current playback signal |
-
1970
- 1970-03-09 NL NL7003326A patent/NL7003326A/xx unknown
- 1970-03-13 FR FR7009080A patent/FR2038902A5/fr not_active Expired
- 1970-03-16 LU LU60528D patent/LU60528A1/xx unknown
- 1970-03-17 GB GB1297699D patent/GB1297699A/en not_active Expired
- 1970-03-18 BE BE747567D patent/BE747567A/fr unknown
Also Published As
| Publication number | Publication date |
|---|---|
| DE1913672A1 (de) | 1970-09-24 |
| FR2038902A5 (fr) | 1971-01-08 |
| BE747567A (fr) | 1970-09-18 |
| DE1913672B2 (de) | 1972-06-29 |
| LU60528A1 (fr) | 1970-05-21 |
| GB1297699A (fr) | 1972-11-29 |