NO20005334L - Leseforsterker uten effektbehov i inaktivt modus - Google Patents

Leseforsterker uten effektbehov i inaktivt modus

Info

Publication number
NO20005334L
NO20005334L NO20005334A NO20005334A NO20005334L NO 20005334 L NO20005334 L NO 20005334L NO 20005334 A NO20005334 A NO 20005334A NO 20005334 A NO20005334 A NO 20005334A NO 20005334 L NO20005334 L NO 20005334L
Authority
NO
Norway
Prior art keywords
idle mode
power requirement
reading amplifier
amplifier
reading
Prior art date
Application number
NO20005334A
Other languages
English (en)
Other versions
NO20005334D0 (no
Inventor
Saroj Pathak
Glen A Rosendale
James E Payne
Nianglamching Hangzo
Original Assignee
Atmel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Atmel Corp filed Critical Atmel Corp
Publication of NO20005334D0 publication Critical patent/NO20005334D0/no
Publication of NO20005334L publication Critical patent/NO20005334L/no

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/062—Differential amplifiers of non-latching type, e.g. comparators, long-tailed pairs
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/065—Differential amplifiers of latching type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1036—Read-write modes for single port memories, i.e. having either a random port or a serial port using data shift registers
NO20005334A 1998-04-22 2000-10-23 Leseforsterker uten effektbehov i inaktivt modus NO20005334L (no)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/064,811 US5963496A (en) 1998-04-22 1998-04-22 Sense amplifier with zero power idle mode
PCT/US1999/006807 WO1999054880A1 (en) 1998-04-22 1999-03-29 Sense amplifier with zero power idle mode

Publications (2)

Publication Number Publication Date
NO20005334D0 NO20005334D0 (no) 2000-10-23
NO20005334L true NO20005334L (no) 2000-10-23

Family

ID=22058413

Family Applications (1)

Application Number Title Priority Date Filing Date
NO20005334A NO20005334L (no) 1998-04-22 2000-10-23 Leseforsterker uten effektbehov i inaktivt modus

Country Status (10)

Country Link
US (1) US5963496A (no)
EP (1) EP1078370A4 (no)
JP (1) JP2002512418A (no)
KR (1) KR20010033907A (no)
CN (1) CN1157735C (no)
CA (1) CA2314249A1 (no)
MY (1) MY116607A (no)
NO (1) NO20005334L (no)
TW (1) TW576017B (no)
WO (1) WO1999054880A1 (no)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100313603B1 (ko) * 1999-06-09 2001-11-26 김영환 반도체 메모리의 센스앰프 제어회로
JP3926645B2 (ja) * 2002-02-22 2007-06-06 株式会社リコー シリアルデータ検出回路
US6809550B2 (en) 2002-09-20 2004-10-26 Atmel Corporation High speed zero DC power programmable logic device (PLD) architecture
JP4278438B2 (ja) * 2003-05-27 2009-06-17 三洋電機株式会社 不揮発性半導体記憶装置及びその制御方法
US7046066B2 (en) * 2004-06-15 2006-05-16 Via Telecom Co., Ltd. Method and/or apparatus for generating a write gated clock signal
US7782702B1 (en) * 2008-10-03 2010-08-24 Xilinx, Inc. Apparatus and method for memory cell power-up sequence
TWI436371B (zh) * 2010-11-02 2014-05-01 Etron Technology Inc 具低功耗之或線比對電路
CN104819811A (zh) * 2015-05-20 2015-08-05 安徽皖南电机股份有限公司 电机端盖铸件质量检测工装
US10734040B1 (en) 2019-03-29 2020-08-04 Apple Inc. Level-shifting transparent window sense amplifier
CN111240244B (zh) * 2020-01-16 2021-03-30 中科亿海微电子科技（苏州）有限公司 一种适用于fpga的可编程脉冲产生装置、电路及方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5594681A (en) * 1990-03-30 1997-01-14 Fujitsu Limited Dynamic random access memory wherein timing of completion of data reading is advanced
JP2789779B2 (ja) * 1990-04-14 1998-08-20 日本電気株式会社 メモリ装置
US5563527A (en) * 1995-04-21 1996-10-08 Xilinx, Inc. Power-managed sense amplifier for programmable logic device

Also Published As

Publication number Publication date
EP1078370A4 (en) 2001-07-04
NO20005334D0 (no) 2000-10-23
MY116607A (en) 2004-02-28
CA2314249A1 (en) 1999-10-28
KR20010033907A (ko) 2001-04-25
HK1035064A1 (en) 2001-11-09
CN1157735C (zh) 2004-07-14
EP1078370A1 (en) 2001-02-28
TW576017B (en) 2004-02-11
JP2002512418A (ja) 2002-04-23
US5963496A (en) 1999-10-05
WO1999054880A1 (en) 1999-10-28
CN1298539A (zh) 2001-06-06

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Legal Events

Date Code Title Description
FC2A Withdrawal, rejection or dismissal of laid open patent application