NO20075885L - Mikroprosessortilgang til operandstakk som en registerfil ved bruk av innebygde instruksjoner - Google Patents

Mikroprosessortilgang til operandstakk som en registerfil ved bruk av innebygde instruksjoner

Info

Publication number
NO20075885L
NO20075885L NO20075885A NO20075885A NO20075885L NO 20075885 L NO20075885 L NO 20075885L NO 20075885 A NO20075885 A NO 20075885A NO 20075885 A NO20075885 A NO 20075885A NO 20075885 L NO20075885 L NO 20075885L
Authority
NO
Norway
Prior art keywords
java
instructions
operand stack
built
register file
Prior art date
Application number
NO20075885A
Other languages
English (en)
Inventor
Oyvind Strom
Eriik K Renno
Kristian Monsen
Original Assignee
Atmel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Atmel Corp filed Critical Atmel Corp
Publication of NO20075885L publication Critical patent/NO20075885L/no

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G06F9/30134—Register stacks; shift registers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/3016—Decoding the operand specifier, e.g. specifier format
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G06F9/30196—Instruction operation extension or modification using decoder, e.g. decoder per instruction set, adaptable or programmable decoders
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/321—Program or instruction counter, e.g. incrementing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Executing Machine-Instructions (AREA)
  • Devices For Executing Special Programs (AREA)
  • Advance Control (AREA)

Abstract

En kombinert innebygd (RISC eller CISC) mikroprosessor og stakk (Java) maskin (10, 11, 13) er konstruert slik at Java VM instruksjoner kan utføres i maskinvare. De fleste Java-instruksjoner utføres direkte (54), mens mer komplekse Java-instruksjoner, slik som de som manipulerer Java objekter, utføres som innebygd mikrokode (56). For at innebygde mikrokodeinstruksjoner skal få tilgang til Java operandstakken peker en Java operandstakkpeker (22; 102) til registerfilplasseringen (15; 90) som er nåværende topp på stakken (ToS), mens en omadresseringsbit (RM) i statusregistret (101) indikerer at registre spesifisert i innebygde instruksjoner er omadressert (90a) som den maksimale Java operandstakkpekerverdien minus nåværende verdi av Java operandstakkpekeren.
NO20075885A 2005-04-15 2007-11-15 Mikroprosessortilgang til operandstakk som en registerfil ved bruk av innebygde instruksjoner NO20075885L (no)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/107,235 US7478224B2 (en) 2005-04-15 2005-04-15 Microprocessor access of operand stack as a register file using native instructions
PCT/US2006/008991 WO2006112978A2 (en) 2005-04-15 2006-03-08 Microprocessor access of operand stack as a register file using native instructions

Publications (1)

Publication Number Publication Date
NO20075885L true NO20075885L (no) 2007-11-15

Family

ID=37109920

Family Applications (1)

Application Number Title Priority Date Filing Date
NO20075885A NO20075885L (no) 2005-04-15 2007-11-15 Mikroprosessortilgang til operandstakk som en registerfil ved bruk av innebygde instruksjoner

Country Status (9)

Country Link
US (1) US7478224B2 (no)
EP (1) EP1875338A4 (no)
JP (1) JP2008536240A (no)
KR (1) KR20070118663A (no)
CN (1) CN101156131A (no)
CA (1) CA2604250A1 (no)
NO (1) NO20075885L (no)
TW (1) TW200705263A (no)
WO (1) WO2006112978A2 (no)

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CN108701025B (zh) * 2016-02-27 2023-08-22 金辛格自动化有限责任公司 安全的存储器寻址方法
FR3070775B1 (fr) * 2017-09-04 2019-08-23 Vsora Allocation dynamique utilisant plusieurs piles
CN111625328B (zh) * 2020-05-15 2023-06-02 芯来智融半导体科技(上海)有限公司 适用于risc-v架构的中断装置、系统及方法
CN112199160B (zh) * 2020-10-16 2021-12-28 常熟理工学院 虚拟指令还原方法、装置、设备及存储介质
CN112199116B (zh) * 2020-10-16 2023-08-11 常熟理工学院 操作数栈寄存器识别方法、装置、设备及存储介质

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Also Published As

Publication number Publication date
US20060236077A1 (en) 2006-10-19
CA2604250A1 (en) 2006-10-26
TW200705263A (en) 2007-02-01
US7478224B2 (en) 2009-01-13
WO2006112978A3 (en) 2007-06-21
WO2006112978A2 (en) 2006-10-26
EP1875338A4 (en) 2008-07-30
EP1875338A2 (en) 2008-01-09
CN101156131A (zh) 2008-04-02
KR20070118663A (ko) 2007-12-17
JP2008536240A (ja) 2008-09-04

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