NO843893L - Hjelpelager for databehandlingsenhet - Google Patents

Hjelpelager for databehandlingsenhet

Info

Publication number
NO843893L
NO843893L NO843893A NO843893A NO843893L NO 843893 L NO843893 L NO 843893L NO 843893 A NO843893 A NO 843893A NO 843893 A NO843893 A NO 843893A NO 843893 L NO843893 L NO 843893L
Authority
NO
Norway
Prior art keywords
microcode
control
control store
bus
instruction
Prior art date
Application number
NO843893A
Other languages
English (en)
Norwegian (no)
Inventor
Richard Lee Harris
Robert Whiting Horst
Original Assignee
Tandem Computers Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tandem Computers Inc filed Critical Tandem Computers Inc
Publication of NO843893L publication Critical patent/NO843893L/no

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G06F9/26—Address formation of the next micro-instruction ; Microprogram storage or retrieval arrangements
    • G06F9/261—Microinstruction address formation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G06F9/26—Address formation of the next micro-instruction ; Microprogram storage or retrieval arrangements
    • G06F9/262—Arrangements for next microinstruction selection
    • G06F9/264—Microinstruction selection based on results of processing
    • G06F9/267—Microinstruction selection based on results of processing by instruction selection on output of storage

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
  • Control Of Non-Positive-Displacement Pumps (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Combined Controls Of Internal Combustion Engines (AREA)
  • Electrical Discharge Machining, Electrochemical Machining, And Combined Machining (AREA)
  • Hardware Redundancy (AREA)
  • Communication Control (AREA)
NO843893A 1983-09-29 1984-09-28 Hjelpelager for databehandlingsenhet NO843893L (no)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/537,038 US4574344A (en) 1983-09-29 1983-09-29 Entry control store for enhanced CPU pipeline performance

Publications (1)

Publication Number Publication Date
NO843893L true NO843893L (no) 1985-04-01

Family

ID=24140919

Family Applications (1)

Application Number Title Priority Date Filing Date
NO843893A NO843893L (no) 1983-09-29 1984-09-28 Hjelpelager for databehandlingsenhet

Country Status (8)

Country Link
US (1) US4574344A (de)
EP (1) EP0136183B1 (de)
JP (1) JPH071479B2 (de)
AT (1) ATE54212T1 (de)
AU (1) AU571010B2 (de)
CA (1) CA1227578A (de)
DE (1) DE3482607D1 (de)
NO (1) NO843893L (de)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4800486A (en) * 1983-09-29 1989-01-24 Tandem Computers Incorporated Multiple data patch CPU architecture
US4812972A (en) * 1984-06-20 1989-03-14 Convex Computer Corporation Microcode computer having dispatch and main control stores for storing the first and the remaining microinstructions of machine instructions
US4794527A (en) * 1986-01-29 1988-12-27 Digital Equipment Corporation Microprogrammed data processing system using latch circuits to access different control stores with the same instruction at different times
US4890218A (en) * 1986-07-02 1989-12-26 Raytheon Company Variable length instruction decoding apparatus having cross coupled first and second microengines
US5235686A (en) * 1987-02-24 1993-08-10 Texas Instruments Incorporated Computer system having mixed macrocode and microcode
US5101341A (en) * 1988-08-25 1992-03-31 Edgcore Technology, Inc. Pipelined system for reducing instruction access time by accumulating predecoded instruction bits a FIFO
JPH0769791B2 (ja) * 1988-12-21 1995-07-31 三菱電機株式会社 マイクロプロセッサ
US5333287A (en) * 1988-12-21 1994-07-26 International Business Machines Corporation System for executing microinstruction routines by using hardware to calculate initialization parameters required therefore based upon processor status and control parameters
EP0388735A3 (de) * 1989-03-10 1993-01-13 Nec Corporation Mikroprogrammsteuerung mit Generator für feste Befehle und Mikroprogrammspeicher
US5293592A (en) * 1989-04-07 1994-03-08 Intel Corporatino Decoder for pipelined system having portion indicating type of address generation and other portion controlling address generation within pipeline
GB2230116B (en) * 1989-04-07 1993-02-17 Intel Corp An improvement for pipelined decoding of instructions in a pipelined processor
CA2030404A1 (en) * 1989-11-27 1991-05-28 Robert W. Horst Microinstruction sequencer
US5377335A (en) * 1991-08-30 1994-12-27 Unisys Corporation Multiple alternate path pipelined microsequencer and method for controlling a computer
JP3497516B2 (ja) * 1992-02-20 2004-02-16 株式会社ルネサステクノロジ データプロセッサ
US5471626A (en) * 1992-05-06 1995-11-28 International Business Machines Corporation Variable stage entry/exit instruction pipeline
EP0661877B1 (de) * 1993-12-28 2000-02-23 Sony Corporation Geräte zur Übertragung von Information
US5790825A (en) * 1995-11-08 1998-08-04 Apple Computer, Inc. Method for emulating guest instructions on a host computer through dynamic recompilation of host instructions
US5860025A (en) * 1996-07-09 1999-01-12 Roberts; David G. Precharging an output peripheral for a direct memory access operation
US7334115B1 (en) * 2000-06-30 2008-02-19 Intel Corporation Detection, recovery and prevention of bogus branches
JP4851418B2 (ja) * 2007-10-25 2012-01-11 古河電気工業株式会社 光ファイバ切断装置
EP2099014B1 (de) * 2008-03-07 2014-06-18 Barco NV Verfahren und Vorrichtung zur Verbesserung der Bildqualität in digitalen Videoverarbeitungssystemen mit Dithering
US11052579B2 (en) 2015-12-08 2021-07-06 Whirlpool Corporation Method for preparing a densified insulation material for use in appliance insulated structure

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3800293A (en) * 1972-12-26 1974-03-26 Ibm Microprogram control subsystem
US4173041A (en) * 1976-05-24 1979-10-30 International Business Machines Corporation Auxiliary microcontrol mechanism for increasing the number of different control actions in a microprogrammed digital data processor having microwords of fixed length
JPS55110347A (en) * 1979-02-16 1980-08-25 Toshiba Corp Microprogram control system
JPS57209542A (en) * 1981-06-19 1982-12-22 Toshiba Corp Microprogram controlling system
US4685080A (en) * 1982-02-22 1987-08-04 International Business Machines Corp. Microword generation mechanism utilizing separate programmable logic arrays for first and second microwords

Also Published As

Publication number Publication date
JPH071479B2 (ja) 1995-01-11
US4574344A (en) 1986-03-04
DE3482607D1 (de) 1990-08-02
EP0136183B1 (de) 1990-06-27
CA1227578A (en) 1987-09-29
JPS60167034A (ja) 1985-08-30
AU571010B2 (en) 1988-03-31
ATE54212T1 (de) 1990-07-15
EP0136183A3 (en) 1986-02-26
AU3359484A (en) 1985-04-04
EP0136183A2 (de) 1985-04-03

Similar Documents

Publication Publication Date Title
NO843893L (no) Hjelpelager for databehandlingsenhet
US6122729A (en) Prefetch buffer which stores a pointer indicating an initial predecode position
US4860199A (en) Hashing indexer for branch cache
US5933626A (en) Apparatus and method for tracing microprocessor instructions
US5845101A (en) Prefetch buffer for storing instructions prior to placing the instructions in an instruction cache
CA1204219A (en) Method and apparatus for prefetching instructions
US6654875B1 (en) Dual microcode RAM address mode instruction execution using operation code RAM storing control words with alternate address indicator
US6049863A (en) Predecoding technique for indicating locations of opcode bytes in variable byte-length instructions within a superscalar microprocessor
KR20010031396A (ko) 신속하게 분기 예측들을 식별하기위해서 명령캐시 내부의바이트 범위들과 결합된 분기 선택기들
EP0096576A2 (de) Mechanismus für die Generation eines unabhängiges Kodes für Mehrprozessorelemente
US5850532A (en) Invalid instruction scan unit for detecting invalid predecode data corresponding to instructions being fetched
US5961638A (en) Branch prediction mechanism employing branch selectors to select a branch prediction
WO1993017384A1 (en) Cpu having pipelined instruction unit and effective address calculation unit with retained virtual address capability
JPH03116236A (ja) 例外処理方法及び例外処理装置
US4348724A (en) Address pairing apparatus for a control store of a data processing system
US4491908A (en) Microprogrammed control of extended integer and commercial instruction processor instructions through use of a data type field in a central processor unit
NO168497B (no) Sentral behandlingsenhet i databehandlingssystemer med "pipeline"-arkitektur.
US5968163A (en) Microcode scan unit for scanning microcode instructions using predecode data
NO174943B (no) Databehandlingsapparat
NO843894L (no) Anordning for mikrokodeforgrening i en databehandlingsenhet
US4360869A (en) Control store organization for a data processing system
KR20010033300A (ko) 분기 예측의 형태를 분류하기위해 복귀 선택 비트들을이용하는 분기 예측
US5872943A (en) Apparatus for aligning instructions using predecoded shift amounts
EP0126124A1 (de) Mehrfach-steuerspeicher in einer mikrosteuereinheit in pipeline-ausführung zum behandeln von verschachtelten unterprogrammen.
US5852727A (en) Instruction scanning unit for locating instructions via parallel scanning of start and end byte information