NO962013D0 - Databehandlingsanordning - Google Patents

Databehandlingsanordning

Info

Publication number
NO962013D0
NO962013D0 NO962013A NO962013A NO962013D0 NO 962013 D0 NO962013 D0 NO 962013D0 NO 962013 A NO962013 A NO 962013A NO 962013 A NO962013 A NO 962013A NO 962013 D0 NO962013 D0 NO 962013D0
Authority
NO
Norway
Prior art keywords
computing device
computing
Prior art date
Application number
NO962013A
Other languages
English (en)
Other versions
NO962013L (no
Inventor
Peter M Compton
Original Assignee
Peter M Compton
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Peter M Compton filed Critical Peter M Compton
Publication of NO962013D0 publication Critical patent/NO962013D0/no
Publication of NO962013L publication Critical patent/NO962013L/no

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/409—Mechanical coupling
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K7/00—Constructional details common to different types of electric apparatus
    • H05K7/14—Mounting supporting structure in casing or on frame or rack
    • H05K7/1438—Back panels or connecting means therefor; Terminals; Coding means to avoid wrong insertion
    • H05K7/1439—Back panel mother boards
    • H05K7/1442—Back panel mother boards with a radial structure

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Electronic Switches (AREA)
NO962013A 1994-09-20 1996-05-15 Databehandlingsanordning NO962013L (no)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
BR9408102A BR9408102A (pt) 1994-09-20 1994-09-20 Estruturas para obter reflexões reduzidas em um ponto comum a partir de qualquer uma de uma multiplicidade de linhas de sinal para fazer a conexão juntando em um ponto comum uma multiplicidade de linhas de sinal e para distribuir sinais elétricos e conector elétrico
PCT/US1994/010593 WO1996009750A1 (en) 1994-09-20 1994-09-20 Data processing device

Publications (2)

Publication Number Publication Date
NO962013D0 true NO962013D0 (no) 1996-05-15
NO962013L NO962013L (no) 1996-06-28

Family

ID=25664640

Family Applications (1)

Application Number Title Priority Date Filing Date
NO962013A NO962013L (no) 1994-09-20 1996-05-15 Databehandlingsanordning

Country Status (13)

Country Link
EP (1) EP0734643A4 (no)
JP (1) JPH09510044A (no)
AU (1) AU3464495A (no)
BR (1) BR9408102A (no)
CZ (1) CZ180196A3 (no)
FI (1) FI962098A7 (no)
HR (1) HRP950481A2 (no)
IL (1) IL115140A (no)
NO (1) NO962013L (no)
SK (1) SK81696A3 (no)
TR (1) TR199501141A2 (no)
WO (1) WO1996009750A1 (no)
ZA (1) ZA957230B (no)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19954942A1 (de) * 1999-11-16 2001-05-17 Cellware Breitband Technologie Verfahren und Vorrichtung zur Verbindung von EDV-Modulen mit einem Bus-Controller
JP5297326B2 (ja) * 2009-10-08 2013-09-25 富士通コンポーネント株式会社 雄コネクタ、コネクタ及びバックプレーン
JP5705601B2 (ja) * 2011-03-16 2015-04-22 古河電気工業株式会社 分岐コネクタ

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE791001A (fr) * 1971-11-08 1973-05-07 Amp Inc Cable electrique plat
US4679872A (en) * 1986-01-27 1987-07-14 Coe Larry D Cylindrical back plane structure for receiving printed circuit boards
US5119273A (en) * 1990-01-29 1992-06-02 The United States Of America As Represented By The Secretary Of The Navy High speed parallel backplane
US5210682A (en) * 1990-10-19 1993-05-11 Graphico Co., Ltd. Radial type of parallel system bus structure having pairs of conductor lines with impedance matching elements
JP2700837B2 (ja) * 1990-10-19 1998-01-21 株式会社 グラフィコ 放射型・パラレル・システムバスにおける基板接続装置
EP0506224A3 (en) * 1991-03-26 1994-05-11 Ibm Computer system package
US5548734A (en) * 1993-03-26 1996-08-20 Intel Corporation Equal length symmetric computer bus topology
US5346117A (en) * 1993-07-27 1994-09-13 International Business Machines Corporation Method of fabricating a parallel processor package

Also Published As

Publication number Publication date
ZA957230B (en) 1997-02-28
SK81696A3 (en) 1997-06-04
FI962098A0 (fi) 1996-05-17
IL115140A (en) 2000-09-28
FI962098L (fi) 1996-07-17
CZ180196A3 (en) 1997-06-11
EP0734643A4 (en) 1997-04-02
EP0734643A1 (en) 1996-10-02
HRP950481A2 (en) 1997-06-30
JPH09510044A (ja) 1997-10-07
NO962013L (no) 1996-06-28
WO1996009750A1 (en) 1996-03-28
FI962098A7 (fi) 1996-07-17
AU3464495A (en) 1996-04-09
BR9408102A (pt) 1997-08-05
IL115140A0 (en) 1995-12-31
TR199501141A2 (tr) 1996-06-21

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Legal Events

Date Code Title Description
FC2A Withdrawal, rejection or dismissal of laid open patent application