NO993483L - Fremgangsmåte og anordning for effektiv overföring av datapakker - Google Patents
Fremgangsmåte og anordning for effektiv overföring av datapakkerInfo
- Publication number
- NO993483L NO993483L NO993483A NO993483A NO993483L NO 993483 L NO993483 L NO 993483L NO 993483 A NO993483 A NO 993483A NO 993483 A NO993483 A NO 993483A NO 993483 L NO993483 L NO 993483L
- Authority
- NO
- Norway
- Prior art keywords
- data
- data processing
- equipment
- processing unit
- transfer
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4027—Coupling between buses using bus bridges
- G06F13/405—Coupling between buses using bus bridges where the bridge performs a synchronising function
- G06F13/4059—Coupling between buses using bus bridges where the bridge performs a synchronising function where the synchronisation uses buffers, e.g. for speed matching between buses
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Small-Scale Networks (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Bus Control (AREA)
Abstract
I et databehandlingssystem forbedres den effektive hastigheten for overføring av datapakker mellom en databehandlingsenhet og forskjellig annet utstyr med forskjellige ytelseskarakteristikker ved tilveiebringelsen av en ny overføringsfremgangsmåte og en pakke- og bufferanordning, som på denne måte avlaster databehandlingsenheten eller de forskjellige utstyrene. FIFO-bufferet tilveiebringer mellomlagring for overføringsdata og pakkings- og utpakkingsmoduler sikrer effektiv bruk av bussbredder som er forskjellige på databehandlingssiden og utstyrssiden. Datapakkeoyerføringsstyring bevirkes ved hjelp av en styrings- og tilstandsmodul med en felles ordteller, og en direkte dataoverføring gjøres ved hjelp av en supplerende direkte datavei mellom databehandlingsenheten og annet utstyr.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| NO993483A NO993483L (no) | 1999-07-15 | 1999-07-15 | Fremgangsmåte og anordning for effektiv overföring av datapakker |
| US09/614,249 US6742063B1 (en) | 1999-07-15 | 2000-07-12 | Method and apparatus for efficient transfer of data packets |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| NO993483A NO993483L (no) | 1999-07-15 | 1999-07-15 | Fremgangsmåte og anordning for effektiv overföring av datapakker |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| NO993483D0 NO993483D0 (no) | 1999-07-15 |
| NO993483L true NO993483L (no) | 2001-01-16 |
Family
ID=19903589
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| NO993483A NO993483L (no) | 1999-07-15 | 1999-07-15 | Fremgangsmåte og anordning for effektiv overföring av datapakker |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US6742063B1 (no) |
| NO (1) | NO993483L (no) |
Families Citing this family (41)
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| US7085266B2 (en) * | 2001-03-21 | 2006-08-01 | International Business Machines Corporation | Apparatus, method and limited set of messages to transmit data between components of a network processor |
| US7634599B2 (en) * | 2001-06-29 | 2009-12-15 | Hewlett-Packard Development Company, Lp. | Method for improving inline compression bandwidth for high speed buses |
| US6910092B2 (en) * | 2001-12-10 | 2005-06-21 | International Business Machines Corporation | Chip to chip interface for interconnecting chips |
| US7228550B1 (en) | 2002-01-07 | 2007-06-05 | Slt Logic, Llc | System and method for making communication streams available to processes executing under control of an operating system but without the intervention of the operating system |
| JP4198376B2 (ja) * | 2002-04-02 | 2008-12-17 | Necエレクトロニクス株式会社 | バスシステム及びバスシステムを含む情報処理システム |
| US7127003B2 (en) * | 2002-09-23 | 2006-10-24 | Rambus Inc. | Method and apparatus for communicating information using different signaling types |
| US7386619B1 (en) * | 2003-01-06 | 2008-06-10 | Slt Logic, Llc | System and method for allocating communications to processors in a multiprocessor system |
| US8832346B2 (en) * | 2003-06-16 | 2014-09-09 | Nvidia Corporation | Data packing and unpacking engine |
| JP4432388B2 (ja) * | 2003-08-12 | 2010-03-17 | 株式会社日立製作所 | 入出力制御装置 |
| US7171506B2 (en) * | 2003-11-17 | 2007-01-30 | Sony Corporation | Plural interfaces in home network with first component having a first host bus width and second component having second bus width |
| US20060218332A1 (en) * | 2005-03-25 | 2006-09-28 | Via Technologies, Inc. | Interface circuit, system, and method for interfacing between buses of different widths |
| US7454666B1 (en) * | 2005-04-07 | 2008-11-18 | Sun Microsystems, Inc. | Real-time address trace generation |
| DE102005026436B4 (de) * | 2005-06-08 | 2022-08-18 | Austriamicrosystems Ag | Schnittstellenanordnung, insbesondere für ein System-on-Chip, und deren Verwendung |
| US7376777B2 (en) * | 2005-09-23 | 2008-05-20 | Freescale Semiconductor, Inc. | Performing an N-bit write access to an M×N-bit-only peripheral |
| US7444442B2 (en) * | 2005-12-13 | 2008-10-28 | Shashank Dabral | Data packing in a 32-bit DMA architecture |
| US20080022079A1 (en) * | 2006-07-24 | 2008-01-24 | Archer Charles J | Executing an allgather operation with an alltoallv operation in a parallel computer |
| US7958291B2 (en) * | 2006-10-10 | 2011-06-07 | Atmel Rousset S.A.S. | Supplemental communication interface |
| US8161480B2 (en) | 2007-05-29 | 2012-04-17 | International Business Machines Corporation | Performing an allreduce operation using shared memory |
| US8140826B2 (en) * | 2007-05-29 | 2012-03-20 | International Business Machines Corporation | Executing a gather operation on a parallel computer |
| US20090006663A1 (en) * | 2007-06-27 | 2009-01-01 | Archer Charles J | Direct Memory Access ('DMA') Engine Assisted Local Reduction |
| US7991857B2 (en) | 2008-03-24 | 2011-08-02 | International Business Machines Corporation | Broadcasting a message in a parallel computer |
| US8122228B2 (en) * | 2008-03-24 | 2012-02-21 | International Business Machines Corporation | Broadcasting collective operation contributions throughout a parallel computer |
| US8422402B2 (en) * | 2008-04-01 | 2013-04-16 | International Business Machines Corporation | Broadcasting a message in a parallel computer |
| US8484440B2 (en) | 2008-05-21 | 2013-07-09 | International Business Machines Corporation | Performing an allreduce operation on a plurality of compute nodes of a parallel computer |
| US8161268B2 (en) * | 2008-05-21 | 2012-04-17 | International Business Machines Corporation | Performing an allreduce operation on a plurality of compute nodes of a parallel computer |
| US8375197B2 (en) * | 2008-05-21 | 2013-02-12 | International Business Machines Corporation | Performing an allreduce operation on a plurality of compute nodes of a parallel computer |
| US8281053B2 (en) * | 2008-07-21 | 2012-10-02 | International Business Machines Corporation | Performing an all-to-all data exchange on a plurality of data buffers by performing swap operations |
| US8504745B1 (en) | 2009-04-02 | 2013-08-06 | Xilinx, Inc. | Method of and circuit for determining a shift pattern to generate an output data stream |
| US8565089B2 (en) | 2010-03-29 | 2013-10-22 | International Business Machines Corporation | Performing a scatterv operation on a hierarchical tree network optimized for collective operations |
| US8332460B2 (en) | 2010-04-14 | 2012-12-11 | International Business Machines Corporation | Performing a local reduction operation on a parallel computer |
| US9424087B2 (en) | 2010-04-29 | 2016-08-23 | International Business Machines Corporation | Optimizing collective operations |
| US8346883B2 (en) | 2010-05-19 | 2013-01-01 | International Business Machines Corporation | Effecting hardware acceleration of broadcast operations in a parallel computer |
| US8489859B2 (en) | 2010-05-28 | 2013-07-16 | International Business Machines Corporation | Performing a deterministic reduction operation in a compute node organized into a branched tree topology |
| US8949577B2 (en) | 2010-05-28 | 2015-02-03 | International Business Machines Corporation | Performing a deterministic reduction operation in a parallel computer |
| US8776081B2 (en) | 2010-09-14 | 2014-07-08 | International Business Machines Corporation | Send-side matching of data communications messages |
| US8566841B2 (en) | 2010-11-10 | 2013-10-22 | International Business Machines Corporation | Processing communications events in parallel active messaging interface by awakening thread from wait state |
| US8893083B2 (en) | 2011-08-09 | 2014-11-18 | International Business Machines Coporation | Collective operation protocol selection in a parallel computer |
| US8910178B2 (en) | 2011-08-10 | 2014-12-09 | International Business Machines Corporation | Performing a global barrier operation in a parallel computer |
| US9495135B2 (en) | 2012-02-09 | 2016-11-15 | International Business Machines Corporation | Developing collective operations for a parallel computer |
| US9348783B2 (en) * | 2012-04-19 | 2016-05-24 | Lockheed Martin Corporation | Apparatus and method emulating a parallel interface to effect parallel data transfer from serial flash memory |
| EP3173935B1 (en) | 2015-11-24 | 2018-06-06 | Stichting IMEC Nederland | Memory access unit |
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| US5255239A (en) | 1991-08-13 | 1993-10-19 | Cypress Semiconductor Corporation | Bidirectional first-in-first-out memory device with transparent and user-testable capabilities |
| CA2069711C (en) | 1991-09-18 | 1999-11-30 | Donald Edward Carmon | Multi-media signal processor computer system |
| US5471632A (en) * | 1992-01-10 | 1995-11-28 | Digital Equipment Corporation | System for transferring data between a processor and a system bus including a device which packs, unpacks, or buffers data blocks being transferred |
| US5297207A (en) * | 1993-05-24 | 1994-03-22 | Degele Steven T | Machine generation of cryptographic keys by non-linear processes similar to processes normally associated with encryption of data |
| US5832310A (en) * | 1993-12-30 | 1998-11-03 | Unisys Corporation | Serial I/O channel having dependent and synchronous sources of control data and user defined data |
| US5673396A (en) | 1994-12-16 | 1997-09-30 | Motorola, Inc. | Adjustable depth/width FIFO buffer for variable width data transfers |
| EP0717348A3 (en) | 1994-12-16 | 1997-06-04 | Motorola Inc | Device and method for inserting an address into a data stream in a data processing system |
| US5712992A (en) | 1995-12-06 | 1998-01-27 | Cypress Semiconductor Corporation | State machine design for generating empty and full flags in an asynchronous FIFO |
| US5627797A (en) | 1995-12-14 | 1997-05-06 | Cypress Semiconductor Corporation | Full and empty flag generator for synchronous FIFOS |
| KR0157924B1 (ko) * | 1995-12-23 | 1998-12-15 | 문정환 | 데이타 전송 시스템 및 그 방법 |
| ATE404922T1 (de) * | 1996-02-29 | 2008-08-15 | Sony Computer Entertainment Inc | Bildverarbeitungsgerät und bildverarbeitungsverfahren |
| US6240481B1 (en) * | 1997-12-22 | 2001-05-29 | Konica Corporation | Data bus control for image forming apparatus |
| US6363076B1 (en) * | 1998-01-27 | 2002-03-26 | International Business Machines Corporation | Phantom buffer for interfacing between buses of differing speeds |
| US6145100A (en) * | 1998-03-04 | 2000-11-07 | Advanced Micro Devices, Inc. | Debug interface including timing synchronization logic |
| US6449678B1 (en) * | 1999-03-24 | 2002-09-10 | International Business Machines Corporation | Method and system for multiple read/write transactions across a bridge system |
| US6460108B1 (en) * | 1999-03-31 | 2002-10-01 | Intel Corporation | Low cost data streaming mechanism |
| US6457091B1 (en) * | 1999-05-14 | 2002-09-24 | Koninklijke Philips Electronics N.V. | PCI bridge configuration having physically separate parts |
-
1999
- 1999-07-15 NO NO993483A patent/NO993483L/no not_active Application Discontinuation
-
2000
- 2000-07-12 US US09/614,249 patent/US6742063B1/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| NO993483D0 (no) | 1999-07-15 |
| US6742063B1 (en) | 2004-05-25 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FC2A | Withdrawal, rejection or dismissal of laid open patent application |