NO995765L - FremgangsmÕte for Õ legge et ledningsmønster - Google Patents

FremgangsmÕte for Õ legge et ledningsmønster

Info

Publication number
NO995765L
NO995765L NO995765A NO995765A NO995765L NO 995765 L NO995765 L NO 995765L NO 995765 A NO995765 A NO 995765A NO 995765 A NO995765 A NO 995765A NO 995765 L NO995765 L NO 995765L
Authority
NO
Norway
Prior art keywords
laying
procedure
wiring pattern
wiring
pattern
Prior art date
Application number
NO995765A
Other languages
English (en)
Norwegian (no)
Other versions
NO995765D0 (no
Inventor
Yuji Toyota
Yoshihiro Koshido
Kei Fujibayashi
Ryoichirio Takahashi
Tadyuki Okawa
Original Assignee
Murata Manufacturing Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co filed Critical Murata Manufacturing Co
Publication of NO995765D0 publication Critical patent/NO995765D0/no
Publication of NO995765L publication Critical patent/NO995765L/no

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/20Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials
    • H10P76/204Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials of organic photoresist masks
    • H10P76/2041Photolithographic processes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/20Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials
    • H10P76/202Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials for lift-off processes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/04Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
    • H05K3/046Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by selective transfer or selective detachment of a conductive layer
    • H05K3/048Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by selective transfer or selective detachment of a conductive layer using a lift-off resist pattern or a release layer pattern
NO995765A 1998-11-25 1999-11-24 FremgangsmÕte for Õ legge et ledningsmønster NO995765L (no)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10334005A JP2000164594A (ja) 1998-11-25 1998-11-25 配線パターンの形成方法

Publications (2)

Publication Number Publication Date
NO995765D0 NO995765D0 (no) 1999-11-24
NO995765L true NO995765L (no) 2000-05-26

Family

ID=18272440

Family Applications (1)

Application Number Title Priority Date Filing Date
NO995765A NO995765L (no) 1998-11-25 1999-11-24 FremgangsmÕte for Õ legge et ledningsmønster

Country Status (7)

Country Link
US (1) US20020076660A1 (fr)
EP (1) EP1005065A3 (fr)
JP (1) JP2000164594A (fr)
KR (1) KR20000035573A (fr)
CN (1) CN1121710C (fr)
CA (1) CA2290306A1 (fr)
NO (1) NO995765L (fr)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3768786B2 (ja) * 2000-08-15 2006-04-19 株式会社ルネサステクノロジ ホトマスクの製造方法、ホトマスクブランクスの製造方法およびホトマスクの再生方法
US6680263B2 (en) * 2002-02-12 2004-01-20 Sandia National Laboratories Method for applying a photoresist layer to a substrate having a preexisting topology
JP3742030B2 (ja) 2002-04-23 2006-02-01 富士通株式会社 平面光導波回路デバイスの製造方法
CN100403518C (zh) * 2002-08-06 2008-07-16 松下电器产业株式会社 半导体装置及其制造方法、生成该装置图案的装置和方法
US8137898B2 (en) * 2007-07-23 2012-03-20 Renesas Electronics Corporation Method for manufacturing semiconductor device
JP2009027060A (ja) * 2007-07-23 2009-02-05 Nec Electronics Corp 半導体装置の製造方法
JP4917985B2 (ja) * 2007-07-23 2012-04-18 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP2012151189A (ja) * 2011-01-17 2012-08-09 Tokyo Electron Ltd 微細パターン形成方法
JP6136913B2 (ja) * 2013-12-19 2017-05-31 豊田合成株式会社 半導体装置の製造方法
CN103839794B (zh) * 2014-02-25 2016-08-17 京东方科技集团股份有限公司 透明导电电极及阵列基板的制备方法
CN106876254B (zh) * 2017-03-14 2019-05-28 京东方科技集团股份有限公司 阵列基板、显示装置、薄膜晶体管及膜层图形的制备方法
CN107863291B (zh) * 2017-11-08 2020-06-26 西安电子科技大学 一种制作t型栅结构的电子束光刻方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3068255D1 (en) * 1979-12-26 1984-07-19 Ibm Process for depositing a pattern of material on a substrate and use of this process for forming a patterned mask structure on a semiconductor substrate
US4379832A (en) * 1981-08-31 1983-04-12 International Business Machines Corporation Method for making low barrier Schottky devices of the electron beam evaporation of reactive metals
JPH053164A (ja) * 1991-06-21 1993-01-08 Toshiba Corp 半導体装置の製造方法
JPH06349829A (ja) * 1993-06-08 1994-12-22 Toshiba Corp 半導体装置の製造方法

Also Published As

Publication number Publication date
US20020076660A1 (en) 2002-06-20
CA2290306A1 (fr) 2000-05-25
KR20000035573A (ko) 2000-06-26
EP1005065A3 (fr) 2000-06-07
EP1005065A2 (fr) 2000-05-31
JP2000164594A (ja) 2000-06-16
NO995765D0 (no) 1999-11-24
CN1121710C (zh) 2003-09-17
CN1254945A (zh) 2000-05-31

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