PL1864383T3 - Przeplatanie z iteracyjnym obliczaniem adresów przeplatania - Google Patents

Przeplatanie z iteracyjnym obliczaniem adresów przeplatania

Info

Publication number
PL1864383T3
PL1864383T3 PL05850579T PL05850579T PL1864383T3 PL 1864383 T3 PL1864383 T3 PL 1864383T3 PL 05850579 T PL05850579 T PL 05850579T PL 05850579 T PL05850579 T PL 05850579T PL 1864383 T3 PL1864383 T3 PL 1864383T3
Authority
PL
Poland
Prior art keywords
interleaving
input
iteration
digital data
output value
Prior art date
Application number
PL05850579T
Other languages
English (en)
Inventor
Isabelle Siaud
Anne-Marie Ulmer-Moll
Original Assignee
France Telecom
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by France Telecom filed Critical France Telecom
Publication of PL1864383T3 publication Critical patent/PL1864383T3/pl

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/276—Interleaving address generation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Complex Calculations (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
PL05850579T 2004-12-31 2005-12-19 Przeplatanie z iteracyjnym obliczaniem adresów przeplatania PL1864383T3 (pl)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
FR0414113A FR2880483A1 (fr) 2004-12-31 2004-12-31 Procede et dispositif d'entrelacement
PCT/FR2005/003237 WO2006072694A1 (fr) 2004-12-31 2005-12-19 Entrelacement avec calcul iteratif des l'adresses d'entrelacement
EP05850579A EP1864383B1 (fr) 2004-12-31 2005-12-19 Entrelacement avec calcul iteratif des adresses d'entrelacement

Publications (1)

Publication Number Publication Date
PL1864383T3 true PL1864383T3 (pl) 2009-07-31

Family

ID=34952958

Family Applications (1)

Application Number Title Priority Date Filing Date
PL05850579T PL1864383T3 (pl) 2004-12-31 2005-12-19 Przeplatanie z iteracyjnym obliczaniem adresów przeplatania

Country Status (11)

Country Link
US (1) US8194527B2 (pl)
EP (2) EP1864383B1 (pl)
JP (1) JP5129576B2 (pl)
KR (1) KR101227560B1 (pl)
CN (1) CN101133559B (pl)
AT (1) ATE425587T1 (pl)
DE (1) DE602005013305D1 (pl)
ES (1) ES2323185T3 (pl)
FR (1) FR2880483A1 (pl)
PL (1) PL1864383T3 (pl)
WO (1) WO2006072694A1 (pl)

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KR101645299B1 (ko) * 2009-03-31 2016-08-03 오렌지 서브-채널들에서 심벌들의 시간―주파수 맵핑을 이용하여 전송하기 위한 방법 및 디바이스
US20110317541A1 (en) * 2010-06-27 2011-12-29 Yen-Chin Liao Block Interleaving Method and Block Interleaver Using the Same
US9021333B1 (en) 2012-05-22 2015-04-28 Pmc-Sierra, Inc. Systems and methods for recovering data from failed portions of a flash drive
US8793556B1 (en) 2012-05-22 2014-07-29 Pmc-Sierra, Inc. Systems and methods for reclaiming flash blocks of a flash drive
US9047214B1 (en) 2012-05-22 2015-06-02 Pmc-Sierra, Inc. System and method for tolerating a failed page in a flash device
US9176812B1 (en) 2012-05-22 2015-11-03 Pmc-Sierra, Inc. Systems and methods for storing data in page stripes of a flash drive
US9183085B1 (en) 2012-05-22 2015-11-10 Pmc-Sierra, Inc. Systems and methods for adaptively selecting from among a plurality of error correction coding schemes in a flash drive for robustness and low latency
US8996957B1 (en) 2012-05-22 2015-03-31 Pmc-Sierra, Inc. Systems and methods for initializing regions of a flash drive having diverse error correction coding (ECC) schemes
US8788910B1 (en) 2012-05-22 2014-07-22 Pmc-Sierra, Inc. Systems and methods for low latency, high reliability error correction in a flash drive
US9021337B1 (en) 2012-05-22 2015-04-28 Pmc-Sierra, Inc. Systems and methods for adaptively selecting among different error correction coding schemes in a flash drive
US8972824B1 (en) 2012-05-22 2015-03-03 Pmc-Sierra, Inc. Systems and methods for transparently varying error correction code strength in a flash drive
US9021336B1 (en) * 2012-05-22 2015-04-28 Pmc-Sierra, Inc. Systems and methods for redundantly storing error correction codes in a flash drive with secondary parity information spread out across each page of a group of pages
US9354844B2 (en) * 2012-12-10 2016-05-31 Intel Deutschland Gmbh Method and apparatus for iteratively calculating a value
US9081701B1 (en) 2013-03-15 2015-07-14 Pmc-Sierra, Inc. Systems and methods for decoding data for solid-state memory
US9026867B1 (en) 2013-03-15 2015-05-05 Pmc-Sierra, Inc. Systems and methods for adapting to changing characteristics of multi-level cells in solid-state memory
US9208018B1 (en) 2013-03-15 2015-12-08 Pmc-Sierra, Inc. Systems and methods for reclaiming memory for solid-state memory
US9009565B1 (en) 2013-03-15 2015-04-14 Pmc-Sierra, Inc. Systems and methods for mapping for solid-state memory
US9053012B1 (en) 2013-03-15 2015-06-09 Pmc-Sierra, Inc. Systems and methods for storing data for solid-state memory
US10986154B2 (en) 2016-05-16 2021-04-20 Glide Talk Ltd. System and method for interleaved media communication and conversion
US10742326B1 (en) 2019-04-18 2020-08-11 Microsoft Technology Licensing, Llc Power-based encoding of data to be transmitted over an optical communication path
US11031961B2 (en) 2019-07-16 2021-06-08 Microsoft Technology Licensing, Llc Smart symbol changes for optimization of communications using error correction
US11075656B2 (en) 2019-07-16 2021-07-27 Microsoft Technology Licensing, Llc Bit error reduction of communication systems using error correction
US11044044B2 (en) 2019-07-16 2021-06-22 Microsoft Technology Licensing, Llc Peak to average power ratio reduction of optical systems utilizing error correction
US11086719B2 (en) 2019-07-16 2021-08-10 Microsoft Technology Licensing, Llc Use of error correction codes to prevent errors in neighboring storage
US11172455B2 (en) 2019-07-16 2021-11-09 Microsoft Technology Licensing, Llc Peak to average power output reduction of RF systems utilizing error correction
US10911284B1 (en) 2019-07-16 2021-02-02 Microsoft Technology Licensing, Llc Intelligent optimization of communication systems utilizing error correction
US11063696B2 (en) 2019-07-16 2021-07-13 Microsoft Technology Licensing, Llc Increasing average power levels to reduce peak-to-average power levels using error correction codes
US10911141B1 (en) * 2019-07-30 2021-02-02 Microsoft Technology Licensing, Llc Dynamically selecting a channel model for optical communications
CN112751572B (zh) * 2021-01-07 2023-03-14 西安电子科技大学 四路并行LTE基4Turbo交织地址生成方法

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US6014761A (en) * 1997-10-06 2000-01-11 Motorola, Inc. Convolutional interleaving/de-interleaving method using pointer incrementing across predetermined distances and apparatus for data transmission
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Also Published As

Publication number Publication date
US20100008214A1 (en) 2010-01-14
CN101133559A (zh) 2008-02-27
JP2008527768A (ja) 2008-07-24
ATE425587T1 (de) 2009-03-15
CN101133559B (zh) 2011-05-04
KR20070104378A (ko) 2007-10-25
ES2323185T3 (es) 2009-07-08
US8194527B2 (en) 2012-06-05
DE602005013305D1 (de) 2009-04-23
FR2880483A1 (fr) 2006-07-07
EP1986330B1 (fr) 2019-08-07
EP1986330A1 (fr) 2008-10-29
JP5129576B2 (ja) 2013-01-30
WO2006072694A1 (fr) 2006-07-13
KR101227560B1 (ko) 2013-01-29
EP1864383A1 (fr) 2007-12-12
EP1864383B1 (fr) 2009-03-11

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