PL3934391T3 - Sposób przynajmniej częściowego zamykania otworu w kształcie kanału - Google Patents

Sposób przynajmniej częściowego zamykania otworu w kształcie kanału

Info

Publication number
PL3934391T3
PL3934391T3 PL20184034.5T PL20184034T PL3934391T3 PL 3934391 T3 PL3934391 T3 PL 3934391T3 PL 20184034 T PL20184034 T PL 20184034T PL 3934391 T3 PL3934391 T3 PL 3934391T3
Authority
PL
Poland
Prior art keywords
channel
shaped opening
partially closing
closing
partially
Prior art date
Application number
PL20184034.5T
Other languages
English (en)
Inventor
Ralf SCHWARTZ
Michael Müller
Johannes TEKATH
Original Assignee
Peters Research Gmbh & Co. Kommanditgesellschaft
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Peters Research Gmbh & Co. Kommanditgesellschaft filed Critical Peters Research Gmbh & Co. Kommanditgesellschaft
Publication of PL3934391T3 publication Critical patent/PL3934391T3/pl

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0094—Filling or covering plated through-holes or blind plated vias, e.g. for masking or for mechanical reinforcement
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09581—Applying an insulating coating on the walls of holes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/0959—Plated through-holes or plated blind vias filled with insulating material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01—Tools for processing; Objects used during processing
    • H05K2203/0104—Tools for processing; Objects used during processing for patterning or coating
    • H05K2203/013—Inkjet printing, e.g. for printing insulating material or resist
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0756—Uses of liquids, e.g. rinsing, coating, dissolving
    • H05K2203/0763—Treating individual holes or single row of holes, e.g. by nozzle
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/15—Position of the PCB during processing
    • H05K2203/1572—Processing both sides of a PCB by the same process; Providing a similar arrangement of components on both sides; Making interlayer connections from two sides

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Coating Apparatus (AREA)
  • Application Of Or Painting With Fluid Materials (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
PL20184034.5T 2020-07-03 2020-07-03 Sposób przynajmniej częściowego zamykania otworu w kształcie kanału PL3934391T3 (pl)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP20184034.5A EP3934391B9 (de) 2020-07-03 2020-07-03 Verfahren zum zumindest teilweisen verschliessen einer kanalförmigen öffnung

Publications (1)

Publication Number Publication Date
PL3934391T3 true PL3934391T3 (pl) 2024-06-10

Family

ID=71514967

Family Applications (1)

Application Number Title Priority Date Filing Date
PL20184034.5T PL3934391T3 (pl) 2020-07-03 2020-07-03 Sposób przynajmniej częściowego zamykania otworu w kształcie kanału

Country Status (9)

Country Link
US (1) US20230262904A1 (pl)
EP (1) EP3934391B9 (pl)
JP (1) JP2023532470A (pl)
KR (1) KR20230034342A (pl)
CN (1) CN115702602A (pl)
CA (1) CA3183850A1 (pl)
HU (1) HUE067165T2 (pl)
PL (1) PL3934391T3 (pl)
WO (1) WO2022003127A1 (pl)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114928943A (zh) * 2022-04-26 2022-08-19 深圳市飞腾云科技有限公司 一种pcb板制作方法以及装置、存储介质以及设备

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10122414A1 (de) * 2001-05-09 2002-11-14 Giesecke & Devrient Gmbh Durchkontaktierung von flexiblen Leiterplatten
JP2003200514A (ja) * 2002-01-10 2003-07-15 Nitto Denko Corp 積層体、配線基板プリプレグ及びその製造方法
JP2005032769A (ja) * 2003-07-07 2005-02-03 Seiko Epson Corp 多層配線の形成方法、配線基板の製造方法、デバイスの製造方法
KR100533210B1 (ko) * 2004-03-19 2005-12-06 주식회사 프로텍 레진 도포장치
KR100777021B1 (ko) * 2006-07-31 2007-11-16 한국생산기술연구원 미세 비아홀 형성 방법 및 이 비아홀 형성방법을 이용한다층 인쇄회로기판
JP2009239238A (ja) * 2008-03-28 2009-10-15 Fujifilm Corp 電子回路基板の製造方法
JP5219612B2 (ja) * 2008-05-12 2013-06-26 パナソニック株式会社 半導体貫通電極形成方法
DE102014106636B4 (de) * 2014-05-12 2021-04-08 Itc Intercircuit Production Gmbh Durchgangsloch-Füllanlage
CN107197596A (zh) * 2016-03-14 2017-09-22 康代有限公司 用印剂填充通路的方法

Also Published As

Publication number Publication date
WO2022003127A1 (de) 2022-01-06
HUE067165T2 (hu) 2024-10-28
KR20230034342A (ko) 2023-03-09
EP3934391A1 (de) 2022-01-05
EP3934391B9 (de) 2024-05-22
CN115702602A (zh) 2023-02-14
US20230262904A1 (en) 2023-08-17
CA3183850A1 (en) 2022-01-06
EP3934391B1 (de) 2024-02-14
JP2023532470A (ja) 2023-07-28

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