PL416989A1 - Hybrid converter of root-mean-square value - Google Patents

Hybrid converter of root-mean-square value

Info

Publication number
PL416989A1
PL416989A1 PL416989A PL41698916A PL416989A1 PL 416989 A1 PL416989 A1 PL 416989A1 PL 416989 A PL416989 A PL 416989A PL 41698916 A PL41698916 A PL 41698916A PL 416989 A1 PL416989 A1 PL 416989A1
Authority
PL
Poland
Prior art keywords
converter
digital
root
mean
square value
Prior art date
Application number
PL416989A
Other languages
Polish (pl)
Other versions
PL228961B1 (en
Inventor
Lesław Topór-Kamiński
Adam Pilśniak
Original Assignee
Politechnika Śląska
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Politechnika Śląska filed Critical Politechnika Śląska
Priority to PL416989A priority Critical patent/PL228961B1/en
Publication of PL416989A1 publication Critical patent/PL416989A1/en
Publication of PL228961B1 publication Critical patent/PL228961B1/en

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  • Analogue/Digital Conversion (AREA)

Abstract

Hybrydowy przetwornik wartości skutecznej charakteryzuje się tym, że zawiera analogowy układ mnożąco-dzielący (1) połączony z filtrem dolnoprzepustowym (2), do którego dołączony jest poprzez przetwornik analogowo-cyfrowy (3) blok cyfrowej korekcji nieliniowości (5), który dołączony jest do wejścia dzielącego (1a) układu mnożąco-dzielącego (1) poprzez przetwornik cyfrowo-analogowy (4), przy czym do bloku cyfrowej korekcji nieliniowości (5) dołączone jest wyjście cyfrowe przetwornika (6).The hybrid RMS converter is characterized in that it contains an analog multiplier (1) connected to a low-pass filter (2), to which it is connected via an analog-to-digital converter (3), a block of digital nonlinearity correction (5), which is attached to dividing input (1a) of the multiplier-dividing system (1) through the digital-to-analog converter (4), where the converter's digital output (6) is connected to the digital non-linearity correction block (5).

PL416989A 2016-04-26 2016-04-26 Hybrid converter of root-mean-square value PL228961B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PL416989A PL228961B1 (en) 2016-04-26 2016-04-26 Hybrid converter of root-mean-square value

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PL416989A PL228961B1 (en) 2016-04-26 2016-04-26 Hybrid converter of root-mean-square value

Publications (2)

Publication Number Publication Date
PL416989A1 true PL416989A1 (en) 2017-11-06
PL228961B1 PL228961B1 (en) 2018-05-30

Family

ID=60190412

Family Applications (1)

Application Number Title Priority Date Filing Date
PL416989A PL228961B1 (en) 2016-04-26 2016-04-26 Hybrid converter of root-mean-square value

Country Status (1)

Country Link
PL (1) PL228961B1 (en)

Also Published As

Publication number Publication date
PL228961B1 (en) 2018-05-30

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