PL424061A1 - Circuit for elimination of interferences in measuring cables - Google Patents

Circuit for elimination of interferences in measuring cables

Info

Publication number
PL424061A1
PL424061A1 PL424061A PL42406117A PL424061A1 PL 424061 A1 PL424061 A1 PL 424061A1 PL 424061 A PL424061 A PL 424061A PL 42406117 A PL42406117 A PL 42406117A PL 424061 A1 PL424061 A1 PL 424061A1
Authority
PL
Poland
Prior art keywords
interference
voltage
outputs
output
measuring
Prior art date
Application number
PL424061A
Other languages
Polish (pl)
Other versions
PL233936B1 (en
Inventor
Grzegorz Kowalski
Paweł Wlazło
Aleksander Lisowiec
Original Assignee
Instytut Tele- I Radiotechniczny
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Instytut Tele- I Radiotechniczny filed Critical Instytut Tele- I Radiotechniczny
Priority to PL424061A priority Critical patent/PL233936B1/en
Publication of PL424061A1 publication Critical patent/PL424061A1/en
Publication of PL233936B1 publication Critical patent/PL233936B1/en

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  • Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
  • Measurement Of Resistance Or Impedance (AREA)

Abstract

Układ do eliminacji zakłóceń w kablach pomiarowych posiada źródło sygnału (U) mające rezystancję wewnętrzną (Rw) i generujące napięcie pomiarowe (Up) dołączone do pierwszych wejść (WE1a) i (WE1b), do których dołączona jest pierwsza skrętka (S1), przechodząca przez pole zakłóceń (Z), której drugi koniec dołączony jest do pierwszych wyjść (WY1a) i (WY1b), na których jest suma napięcia pomiarowego (Up) i napięcia zakłóceń (Uz). Rezystor korekcyjny (Rk), równy wartością rezystancji wewnętrznej (Rw) i mający napięcie zerowe (U0), dołączony jest do drugich wejść (WE2a) i (WE2b), do których dołączona jest druga skrętka (S2), przechodząca przez pole zakłóceń (Z), której drugi koniec dołączony jest do drugich wyjść (WY2a) i (WY2b), na których jest napięcie zakłóceń (Uz). Jedno z pierwszych wyjść (WY1b) zwarte jest w punkcie (P) z jednym z drugich wyjść (WY2b) a wyjście (WY1a) dołączone jest do wyjścia układu (WYa). Wyjście (WY2a) dołączone jest do wyjścia układu (WYb), co powoduje, że napięcia zakłóceń (Uz) się znoszą a na wyjściu układu (WYa) i (WYb) jest tylko napięcie pomiarowe (Up).The system for eliminating interference in measuring cables has a signal source (U) having an internal resistance (Rw) and generating a measuring voltage (Up) connected to the first inputs (WE1a) and (WE1b), to which the first twisted pair (S1) is connected, passing through the interference field (Z), whose other end is connected to the first outputs (WY1a) and (WY1b), on which is the sum of the measuring voltage (Up) and the interference voltage (Uz). A correction resistor (Rk), equal to the internal resistance value (Rw) and having a zero voltage (U0), is connected to the second inputs (WE2a) and (WE2b), to which a second twisted pair (S2) is connected, passing through the interference field (Z ), the other end of which is connected to the other outputs (WY2a) and (WY2b), on which there is interference voltage (Uz). One of the first outputs (WY1b) is shorted at point (P) with one of the second outputs (WY2b) and the output (WY1a) is connected to the system output (WYa). The output (WY2a) is connected to the system output (WYb), which means that the interference voltages (Uz) cancel each other out and only the measuring voltage (Up) is present at the system output (WYa) and (WYb).

PL424061A 2017-12-27 2017-12-27 Circuit for elimination of interferences in measuring cables PL233936B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PL424061A PL233936B1 (en) 2017-12-27 2017-12-27 Circuit for elimination of interferences in measuring cables

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PL424061A PL233936B1 (en) 2017-12-27 2017-12-27 Circuit for elimination of interferences in measuring cables

Publications (2)

Publication Number Publication Date
PL424061A1 true PL424061A1 (en) 2019-07-01
PL233936B1 PL233936B1 (en) 2019-12-31

Family

ID=67105531

Family Applications (1)

Application Number Title Priority Date Filing Date
PL424061A PL233936B1 (en) 2017-12-27 2017-12-27 Circuit for elimination of interferences in measuring cables

Country Status (1)

Country Link
PL (1) PL233936B1 (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0982597A2 (en) * 1998-08-28 2000-03-01 Neuromag Oy Method and apparatus for eliminating background interference signals from multichannel detector arrays
US6380725B1 (en) * 2000-02-15 2002-04-30 Nxtphase Corporation Voltage sensor
CN204495859U (en) * 2015-04-21 2015-07-22 株洲电力机车厂长河机电产品开发公司 A locomotive AC grid insulation monitoring signal isolation device
PL223832B1 (en) * 2012-05-14 2016-11-30 Politechnika Wroclawska Screen Rogowski coil

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0982597A2 (en) * 1998-08-28 2000-03-01 Neuromag Oy Method and apparatus for eliminating background interference signals from multichannel detector arrays
US6380725B1 (en) * 2000-02-15 2002-04-30 Nxtphase Corporation Voltage sensor
PL223832B1 (en) * 2012-05-14 2016-11-30 Politechnika Wroclawska Screen Rogowski coil
CN204495859U (en) * 2015-04-21 2015-07-22 株洲电力机车厂长河机电产品开发公司 A locomotive AC grid insulation monitoring signal isolation device

Also Published As

Publication number Publication date
PL233936B1 (en) 2019-12-31

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