PL432075A1 - CMOS current to voltage converter with a negative feedback loop - Google Patents
CMOS current to voltage converter with a negative feedback loopInfo
- Publication number
- PL432075A1 PL432075A1 PL432075A PL43207519A PL432075A1 PL 432075 A1 PL432075 A1 PL 432075A1 PL 432075 A PL432075 A PL 432075A PL 43207519 A PL43207519 A PL 43207519A PL 432075 A1 PL432075 A1 PL 432075A1
- Authority
- PL
- Poland
- Prior art keywords
- pairs
- cmos
- feedback loop
- negative feedback
- voltage
- Prior art date
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- Amplifiers (AREA)
Abstract
Przedmiotem zgłoszenia jest przedstawiony na rysunku przetwornik prądowo - napięciowy CMOS z pętlą ujemnego sprzężenia zwrotnego. Przetwornik jest oparty na pięciu parach CMOS przetwarzających prąd stały na napięcie stałe. Zbliżona do liniowej zależność napięcia wyjściowego od prądu wejściowego jest oparta na pięciu parach CMOS. Każda para zawiera dwa tranzystory, jeden typu PMOS, a drugi typu NMOS. Trzy pary przekształcają prąd wejściowy na napięcie wyjściowe. Pozostałe dwie pary budują pętlę ujemnego sprzężenia zwrotnego. Zaletą przetwornika jest bardzo małe napięcie zasilania. Wynika ono z wykorzystania małego napięcia dren-źródło tranzystorów tworzących pary CMOS i pracujących podprogowo.The subject of the application is the CMOS current-voltage converter with a negative feedback loop shown in the drawing. The converter is based on five CMOS pairs converting direct current to direct voltage. The almost linear dependence of the output voltage on the input current is based on five pairs of CMOS. Each pair contains two transistors, one of the PMOS type and the other of the NMOS type. The three pairs convert the input current to the output voltage. The other two pairs build a negative feedback loop. The advantage of the converter is a very low supply voltage. It results from the use of a low drain-source voltage of transistors that form CMOS pairs and work subliminal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PL432075A PL432075A1 (en) | 2019-12-04 | 2019-12-04 | CMOS current to voltage converter with a negative feedback loop |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PL432075A PL432075A1 (en) | 2019-12-04 | 2019-12-04 | CMOS current to voltage converter with a negative feedback loop |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| PL432075A1 true PL432075A1 (en) | 2021-06-14 |
Family
ID=76321231
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PL432075A PL432075A1 (en) | 2019-12-04 | 2019-12-04 | CMOS current to voltage converter with a negative feedback loop |
Country Status (1)
| Country | Link |
|---|---|
| PL (1) | PL432075A1 (en) |
-
2019
- 2019-12-04 PL PL432075A patent/PL432075A1/en unknown
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