PL450729A1 - Arbiter and method of regulating the operation of the arbiter - Google Patents

Arbiter and method of regulating the operation of the arbiter

Info

Publication number
PL450729A1
PL450729A1 PL450729A PL45072924A PL450729A1 PL 450729 A1 PL450729 A1 PL 450729A1 PL 450729 A PL450729 A PL 450729A PL 45072924 A PL45072924 A PL 45072924A PL 450729 A1 PL450729 A1 PL 450729A1
Authority
PL
Poland
Prior art keywords
flip
arbiter
flop
regulation
flops
Prior art date
Application number
PL450729A
Other languages
Polish (pl)
Inventor
Piotr Z. Wieczorek
Krzysztof Gołofit
Original Assignee
Politechnika Warszawska
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Politechnika Warszawska filed Critical Politechnika Warszawska
Priority to PL450729A priority Critical patent/PL450729A1/en
Publication of PL450729A1 publication Critical patent/PL450729A1/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D13/00—Circuits for comparing the phase or frequency of two mutually-independent oscillations
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D13/00—Circuits for comparing the phase or frequency of two mutually-independent oscillations
    • H03D13/003—Circuits for comparing the phase or frequency of two mutually-independent oscillations in which both oscillations are converted by logic means into pulses which are applied to filtering or integrating means
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D13/00—Circuits for comparing the phase or frequency of two mutually-independent oscillations
    • H03D13/003—Circuits for comparing the phase or frequency of two mutually-independent oscillations in which both oscillations are converted by logic means into pulses which are applied to filtering or integrating means
    • H03D13/004—Circuits for comparing the phase or frequency of two mutually-independent oscillations in which both oscillations are converted by logic means into pulses which are applied to filtering or integrating means the logic means delivering pulses at more than one terminal, e.g. up and down pulses
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D3/00—Demodulation of angle-, frequency- or phase- modulated oscillations
    • H03D3/02—Demodulation of angle-, frequency- or phase- modulated oscillations by detecting phase difference between two signals obtained from input signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D3/00—Demodulation of angle-, frequency- or phase- modulated oscillations
    • H03D3/02—Demodulation of angle-, frequency- or phase- modulated oscillations by detecting phase difference between two signals obtained from input signal
    • H03D3/18—Demodulation of angle-, frequency- or phase- modulated oscillations by detecting phase difference between two signals obtained from input signal by means of synchronous gating arrangements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D3/00—Demodulation of angle-, frequency- or phase- modulated oscillations
    • H03D3/02—Demodulation of angle-, frequency- or phase- modulated oscillations by detecting phase difference between two signals obtained from input signal
    • H03D3/18—Demodulation of angle-, frequency- or phase- modulated oscillations by detecting phase difference between two signals obtained from input signal by means of synchronous gating arrangements
    • H03D3/20—Demodulation of angle-, frequency- or phase- modulated oscillations by detecting phase difference between two signals obtained from input signal by means of synchronous gating arrangements producing pulses whose amplitude or duration depends on phase difference

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)

Abstract

Zgłoszenie dotyczy arbitra (ARB) i sposobów regulacji pracą arbitra, zbudowanego z dwóch przerzutników (P1, P2) komplementarnie podłączonych do jego wejść (i1-A, i2-A) oraz elementów logicznych (AND, NOT, XNOR) dołączonych do wyjść przerzutników (Q1, Q2) i zamieniających pierwszeństwo na logiczne wartości oraz wykrywających wewnętrzny błąd arbitrażu, sygnalizowany na wyjściu błędów (er-A). Wskutek błędu odcinane jest wyjście arbitra (o-A) przez bufor trójstanowy (B), a błędy arbitrażu zapisywane są w rejestrze przesuwnym. Pracą przerzutników steruje układ kompensacji i regulacji (UKR), który dzięki specjalnej budowie przerzutników pozwala na: regulację szybkości jednego przerzutnika względem drugiego, regulację pracy między stopniem master i slave w każdym przerzutniku, równoważenie pracy każdego stopnia każdego przerzutnika, wzorcowanie arbitra, kompensację w trakcie pracy, czy regulację pobieranej mocy. Dzięki zgłoszeniu możliwa jest kompensacja rozrzutów technologicznych, zmiana położenia i rozmiaru okna metastabilności, regulacja wpływu szumu fazowego, redukcja czasu regeneracji, kompensacja wpływu starzenia się, pracy mechanicznej czy oddziaływania czynników środowiskowych.The application concerns an arbiter (ARB) and methods for regulating the operation of an arbiter, constructed from two flip-flops (P1, P2) complementarily connected to its inputs (i1-A, i2-A) and logical elements (AND, NOT, XNOR) connected to the flip-flop outputs (Q1, Q2). These elements convert priority to logical values and detect an internal arbitration error, which is signaled at the error output (er-A). This error cuts off the arbiter output (o-A) via a tri-state buffer (B), and arbitration errors are stored in a shift register. The operation of the flip-flops is controlled by a compensation and regulation circuit (UKR). Thanks to the flip-flops' special design, the circuits allow for: speed regulation of one flip-flop relative to the other, regulation of the master and slave stages in each flip-flop, balancing the operation of each stage within each flip-flop, calibration of the arbiter, compensation during operation, and power consumption regulation. Thanks to the notification, it is possible to compensate for technological dispersion, change the position and size of the metastability window, regulate the influence of phase noise, reduce the regeneration time, compensate for the influence of aging, mechanical work or the impact of environmental factors.

PL450729A 2024-12-27 2024-12-27 Arbiter and method of regulating the operation of the arbiter PL450729A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PL450729A PL450729A1 (en) 2024-12-27 2024-12-27 Arbiter and method of regulating the operation of the arbiter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PL450729A PL450729A1 (en) 2024-12-27 2024-12-27 Arbiter and method of regulating the operation of the arbiter

Publications (1)

Publication Number Publication Date
PL450729A1 true PL450729A1 (en) 2026-01-19

Family

ID=98430761

Family Applications (1)

Application Number Title Priority Date Filing Date
PL450729A PL450729A1 (en) 2024-12-27 2024-12-27 Arbiter and method of regulating the operation of the arbiter

Country Status (1)

Country Link
PL (1) PL450729A1 (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001069786A2 (en) * 2000-03-15 2001-09-20 Giga Aps A phase detector
CN101399541A (en) * 2007-09-25 2009-04-01 立积电子股份有限公司 Adjustable digital lock detector
PL236966B1 (en) * 2017-08-08 2021-03-08 Politechnika Warszawska Random generator
PL236965B1 (en) * 2017-08-08 2021-03-08 Politechnika Warszawska Random generator

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001069786A2 (en) * 2000-03-15 2001-09-20 Giga Aps A phase detector
CN101399541A (en) * 2007-09-25 2009-04-01 立积电子股份有限公司 Adjustable digital lock detector
PL236966B1 (en) * 2017-08-08 2021-03-08 Politechnika Warszawska Random generator
PL236965B1 (en) * 2017-08-08 2021-03-08 Politechnika Warszawska Random generator

Similar Documents

Publication Publication Date Title
PL450744A3 (en) Random generator with arbiter
US7292672B2 (en) Register circuit, and synchronous integrated circuit that includes a register circuit
PL450729A1 (en) Arbiter and method of regulating the operation of the arbiter
PL450813A3 (en) Random generator with arbiter
PL450791A3 (en) Random generator with arbiter
PL450770A3 (en) Random generator with arbiter
PL450776A3 (en) Random generator with arbiter
PL450781A3 (en) Random generator with arbiter
PL450760A3 (en) Random generator with arbiter
PL450803A3 (en) Random generator with arbiter
PL450786A3 (en) Random generator with arbiter
PL450818A3 (en) Random generator with arbiter
PL450755A3 (en) Random generator with arbiter
PL450765A3 (en) Random generator with arbiter
PL450752A3 (en) Random generator with arbiter
PL450746A3 (en) Metastability random generator with arbiter
PL450749A3 (en) Metastability random generator with arbiter
PL450747A3 (en) Metastability random generator with arbiter
PL450831A3 (en) Metastability random generator with arbiter
PL450833A3 (en) Metastability random generator with arbiter
PL450835A3 (en) Metastability random generator with arbiter
PL450837A3 (en) Metastability random generator with arbiter
PL450808A3 (en) Random generator with arbiter
US8291363B2 (en) Method of measuring setup time with consideration of characteristic of absorbing clock skew in a pulse-based flip-flop
PL450730A3 (en) Generator of physically unclonable cryptographic keys with phase detector