SE470502B - Förfarande och anordning för att minimera en faslägesskillnad mellan två dataströmmar före omkoppling - Google Patents

Förfarande och anordning för att minimera en faslägesskillnad mellan två dataströmmar före omkoppling

Info

Publication number: SE470502B
Authority: SE; Sweden
Prior art keywords: data streams; control unit; delay; switching; setpoint
Prior art date: 1992-10-26

Application number

SE9203126A

Other languages

English (en)

Swedish (sv)

Other versions

SE9203126D0 (sv

SE9203126L (sv

Inventor

Karl Oerjan Eriksson

Original Assignee

Ericsson Telefon Ab L M

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1992-10-26

Filing date

1992-10-26

Publication date

1994-06-06

1992-10-26 Application filed by Ericsson Telefon Ab L M filed Critical Ericsson Telefon Ab L M

1992-10-26 Priority to SE9203126A priority Critical patent/SE470502B/sv

1992-10-26 Publication of SE9203126D0 publication Critical patent/SE9203126D0/xx

1993-10-12 Priority to EP93850192A priority patent/EP0595780B1/de

1993-10-12 Priority to DE69317506T priority patent/DE69317506T2/de

1993-10-26 Priority to US08/141,091 priority patent/US5533073A/en

1994-04-27 Publication of SE9203126L publication Critical patent/SE9203126L/

1994-06-06 Publication of SE470502B publication Critical patent/SE470502B/sv

Links

238000000034 method Methods 0.000 title claims description 38
238000012935 Averaging Methods 0.000 claims description 7
230000001934 delay Effects 0.000 claims description 6
238000005070 sampling Methods 0.000 claims description 4
230000003247 decreasing effect Effects 0.000 claims 1
238000010586 diagram Methods 0.000 description 5
238000013459 approach Methods 0.000 description 2
230000005540 biological transmission Effects 0.000 description 2
239000000872 buffer Substances 0.000 description 2
230000002301 combined effect Effects 0.000 description 2
238000010924 continuous production Methods 0.000 description 2
238000011156 evaluation Methods 0.000 description 2
230000006870 function Effects 0.000 description 2
238000005259 measurement Methods 0.000 description 2
230000010363 phase shift Effects 0.000 description 2
238000012545 processing Methods 0.000 description 2
230000033228 biological regulation Effects 0.000 description 1
230000007423 decrease Effects 0.000 description 1
230000003111 delayed effect Effects 0.000 description 1
230000000694 effects Effects 0.000 description 1
238000012544 monitoring process Methods 0.000 description 1
230000000717 retained effect Effects 0.000 description 1
238000012546 transfer Methods 0.000 description 1

Classifications

- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0079—Receiver details
- H04L7/0083—Receiver details taking measures against momentary loss of synchronisation, e.g. inhibiting the synchronisation, using idle words or using redundant clocks
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/062—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
- H04J3/0626—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers plesiochronous multiplexing systems, e.g. plesiochronous digital hierarchy [PDH], jitter attenuators
- H04J3/0629—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers plesiochronous multiplexing systems, e.g. plesiochronous digital hierarchy [PDH], jitter attenuators in a network, e.g. in combination with switching or multiplexing, slip buffers

Landscapes

Engineering & Computer Science (AREA)
Computer Networks & Wireless Communication (AREA)
Signal Processing (AREA)
Computer Hardware Design (AREA)
Synchronisation In Digital Transmission Systems (AREA)
Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Detection And Prevention Of Errors In Transmission (AREA)

SE9203126A 1992-10-26 1992-10-26 Förfarande och anordning för att minimera en faslägesskillnad mellan två dataströmmar före omkoppling SE470502B (sv)

Priority Applications (4)

Application Number	Priority Date	Filing Date	Title
SE9203126A SE470502B (sv)	1992-10-26	1992-10-26	Förfarande och anordning för att minimera en faslägesskillnad mellan två dataströmmar före omkoppling
EP93850192A EP0595780B1 (de)	1992-10-26	1993-10-12	Verfahren und Anordnung zur Minimierung der Phasendifferenz zwischen zwei Datenströmen vor der Umschaltung
DE69317506T DE69317506T2 (de)	1992-10-26	1993-10-12	Verfahren und Anordnung zur Minimierung der Phasendifferenz zwischen zwei Datenströmen vor der Umschaltung
US08/141,091 US5533073A (en)	1992-10-26	1993-10-26	Method and an arrangement for minimizing a phase difference between two datastreams prior to changeover

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
SE9203126A SE470502B (sv)	1992-10-26	1992-10-26	Förfarande och anordning för att minimera en faslägesskillnad mellan två dataströmmar före omkoppling

Publications (3)

Publication Number	Publication Date
SE9203126D0 SE9203126D0 (sv)	1992-10-26
SE9203126L SE9203126L (sv)	1994-04-27
SE470502B true SE470502B (sv)	1994-06-06

Family

ID=20387560

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
SE9203126A SE470502B (sv)	1992-10-26	1992-10-26	Förfarande och anordning för att minimera en faslägesskillnad mellan två dataströmmar före omkoppling

Country Status (4)

Country	Link
US (1)	US5533073A (de)
EP (1)	EP0595780B1 (de)
DE (1)	DE69317506T2 (de)
SE (1)	SE470502B (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
EP0618694A3 (de) *	1993-04-01	1995-05-03	Ant Nachrichtentech	Verfahren zur Laufzeit-und Taktphasensynchronisation von Datensignalen.
US5870047A (en) *	1997-07-07	1999-02-09	Sicom, Inc.	Signal converter using multiple data streams and method therefor
US7940877B1 (en)	2003-11-26	2011-05-10	Altera Corporation	Signal edge detection circuitry and methods
US7295641B1 (en) *	2003-11-26	2007-11-13	Altera Corporation	Phase alignment circuitry and methods

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
FR2600474B1 (fr) *	1986-06-18	1988-08-26	Alcatel Thomson Faisceaux	Procede de synchronisation de deux trains binaires
FR2641428B1 (fr) *	1988-12-08	1991-02-15	Alcatel Transmission	Dispositif de commutation d'un train binaire sur un autre
JP2566459B2 (ja) *	1989-05-08	1996-12-25	日本電気エンジニアリング株式会社	エラスティックバッファ回路
FR2661578A1 (fr) *	1990-04-27	1991-10-31	Trt Telecom Radio Electr	Dispositif de commutation dynamique pour le masquage d'erreurs dans un systeme a doublement du conduit numerique.

1992
- 1992-10-26 SE SE9203126A patent/SE470502B/sv not_active IP Right Cessation
1993
- 1993-10-12 EP EP93850192A patent/EP0595780B1/de not_active Expired - Lifetime
- 1993-10-12 DE DE69317506T patent/DE69317506T2/de not_active Expired - Fee Related
- 1993-10-26 US US08/141,091 patent/US5533073A/en not_active Expired - Fee Related

Also Published As

Publication number	Publication date
US5533073A (en)	1996-07-02
DE69317506D1 (de)	1998-04-23
EP0595780A1 (de)	1994-05-04
EP0595780B1 (de)	1998-03-18
DE69317506T2 (de)	1998-07-09
SE9203126D0 (sv)	1992-10-26
SE9203126L (sv)	1994-04-27

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1995-01-31

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