SE7708396L - Frekvensreknare - Google Patents

Frekvensreknare

Info

Publication number
SE7708396L
SE7708396L SE7708396A SE7708396A SE7708396L SE 7708396 L SE7708396 L SE 7708396L SE 7708396 A SE7708396 A SE 7708396A SE 7708396 A SE7708396 A SE 7708396A SE 7708396 L SE7708396 L SE 7708396L
Authority
SE
Sweden
Prior art keywords
counter
input signal
preset
sum
output
Prior art date
Application number
SE7708396A
Other languages
Unknown language ( )
English (en)
Other versions
SE416695B (sv
Inventor
R L Miller
R N Weisshappel
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of SE7708396L publication Critical patent/SE7708396L/sv
Publication of SE416695B publication Critical patent/SE416695B/sv

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K23/00—Pulse counters comprising counting chains; Frequency dividers comprising counting chains
    • H03K23/64—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two
    • H03K23/66—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two with a variable counting base, e.g. by presetting or by adding or suppressing pulses
    • H03K23/665—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two with a variable counting base, e.g. by presetting or by adding or suppressing pulses by presetting
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/68—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using pulse rate multipliers or dividers pulse rate multipliers or dividers per se
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K23/00—Pulse counters comprising counting chains; Frequency dividers comprising counting chains
    • H03K23/64—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two
    • H03K23/66—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two with a variable counting base, e.g. by presetting or by adding or suppressing pulses
    • H03K23/667—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two with a variable counting base, e.g. by presetting or by adding or suppressing pulses by switching the base during a counting cycle
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/193—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number the frequency divider/counter comprising a commutable pre-divider, e.g. a two modulus divider

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Mathematical Physics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Measuring Frequencies, Analyzing Spectra (AREA)
  • Complex Calculations (AREA)
  • Accessory Devices And Overall Control Thereof (AREA)
  • Electric Clocks (AREA)
SE7708396A 1976-08-11 1977-07-21 Frekvensreknare SE416695B (sv)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/713,470 US4053739A (en) 1976-08-11 1976-08-11 Dual modulus programmable counter

Publications (2)

Publication Number Publication Date
SE7708396L true SE7708396L (sv) 1978-02-12
SE416695B SE416695B (sv) 1981-01-26

Family

ID=24866273

Family Applications (1)

Application Number Title Priority Date Filing Date
SE7708396A SE416695B (sv) 1976-08-11 1977-07-21 Frekvensreknare

Country Status (9)

Country Link
US (1) US4053739A (sv)
JP (1) JPS5321563A (sv)
CA (1) CA1097407A (sv)
DE (1) DE2735204C2 (sv)
DK (1) DK355777A (sv)
FR (1) FR2361778A1 (sv)
GB (1) GB1575664A (sv)
NL (1) NL7708804A (sv)
SE (1) SE416695B (sv)

Families Citing this family (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4184068A (en) * 1977-11-14 1980-01-15 Harris Corporation Full binary programmed frequency divider
US4357527A (en) * 1978-01-31 1982-11-02 Tokyo Shibaura Denki Kabushiki Kaisha Programmable divider
US4231104A (en) * 1978-04-26 1980-10-28 Teradyne, Inc. Generating timing signals
US4241408A (en) * 1979-04-04 1980-12-23 Norlin Industries, Inc. High resolution fractional divider
US4327623A (en) * 1979-04-12 1982-05-04 Nippon Gakki Seizo Kabushiki Kaisha Reference frequency signal generator for tuning apparatus
JPS5673907A (en) * 1979-11-21 1981-06-19 Hitachi Ltd Frequency divider
US4330751A (en) * 1979-12-03 1982-05-18 Norlin Industries, Inc. Programmable frequency and duty cycle tone signal generator
US4316151A (en) * 1980-02-13 1982-02-16 Motorola, Inc. Phase locked loop frequency synthesizer using multiple dual modulus prescalers
US4325031A (en) * 1980-02-13 1982-04-13 Motorola, Inc. Divider with dual modulus prescaler for phase locked loop frequency synthesizer
US4355365A (en) * 1980-04-28 1982-10-19 Otis Engineering Corporation Electronic intermitter
JPS577634A (en) * 1980-06-16 1982-01-14 Victor Co Of Japan Ltd Frequency dividing circuit
US4468797A (en) * 1981-02-13 1984-08-28 Oki Electric Industry Co., Ltd. Swallow counters
AU8339682A (en) * 1981-04-06 1982-10-19 Motorola, Inc. Frequency synthesized transceiver
US4559613A (en) * 1982-06-29 1985-12-17 The United States Of America As Represented By The Secretary Of The Air Force Digital frequency synthesizer circuit
GB2132047A (en) * 1982-12-04 1984-06-27 Grundy & Partners Ltd Frequency divider circuits
JPS60136422A (ja) * 1983-12-26 1985-07-19 Hitachi Ltd プリスケラ
US4574385A (en) * 1984-02-16 1986-03-04 Rockwell International Corporation Clock divider circuit incorporating a J-K flip-flop as the count logic decoding means in the feedback loop
GB2176353B (en) * 1985-06-06 1988-08-24 Motorola Inc D/a converter
US4658406A (en) * 1985-08-12 1987-04-14 Andreas Pappas Digital frequency divider or synthesizer and applications thereof
CA1290407C (en) * 1986-12-23 1991-10-08 Shigeki Saito Frequency synthesizer
US4891825A (en) * 1988-02-09 1990-01-02 Motorola, Inc. Fully synchronized programmable counter with a near 50% duty cycle output signal
US5045813A (en) * 1989-10-19 1991-09-03 Nihon Musen Kabushiki Kaisha Slip phase control PLL
JP2572283B2 (ja) * 1989-10-23 1997-01-16 日本無線株式会社 可変分周回路
US5066927A (en) * 1990-09-06 1991-11-19 Ericsson Ge Mobile Communication Holding, Inc. Dual modulus counter for use in a phase locked loop
US5195111A (en) * 1990-09-07 1993-03-16 Nihon Musen Kabushiki Kaisha Programmable frequency dividing apparatus
EP0491064A1 (de) * 1990-12-17 1992-06-24 Siemens Aktiengesellschaft Verfahren und Anordnung zum Teilen der Frequenz einer Wechselspannung mit einem nicht ganzzahligen Teilungsfaktor
US5495505A (en) * 1990-12-20 1996-02-27 Motorola, Inc. Increased frequency resolution in a synthesizer
US5842006A (en) * 1995-09-06 1998-11-24 National Instruments Corporation Counter circuit with multiple registers for seamless signal switching
US5781459A (en) * 1996-04-16 1998-07-14 Bienz; Richard Alan Method and system for rational frequency synthesis using a numerically controlled oscillator
US6072404A (en) * 1997-04-29 2000-06-06 Eaton Corporation Universal garage door opener
US6035182A (en) * 1998-01-20 2000-03-07 Motorola, Inc. Single counter dual modulus frequency division apparatus
US6725245B2 (en) 2002-05-03 2004-04-20 P.C. Peripherals, Inc High speed programmable counter architecture
US7830729B2 (en) * 2007-06-15 2010-11-09 Micron Technology, Inc. Digital filters with memory
US10972121B2 (en) * 2018-12-20 2021-04-06 Viavi Solutions Inc. System and method for signal resampling

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3353104A (en) * 1963-10-02 1967-11-14 Ltv Electrosystems Inc Frequency synthesizer using fractional division by digital techniques within a phase-locked loop
DE1201406B (de) * 1964-07-11 1965-09-23 Telefunken Patent In seinem Teilerfaktor einstellbarer digitaler Frequenzteiler
US3594551A (en) * 1966-11-29 1971-07-20 Electronic Communications High speed digital counter
US3605025A (en) * 1969-06-30 1971-09-14 Sperry Rand Corp Fractional output frequency-dividing apparatus
US3714589A (en) * 1971-12-01 1973-01-30 R Lewis Digitally controlled phase shifter
US3786488A (en) * 1971-12-30 1974-01-15 Woodward Governor Co Algebraic summing digital-to-analog converter
US3959737A (en) * 1974-11-18 1976-05-25 Engelmann Microwave Co. Frequency synthesizer having fractional frequency divider in phase-locked loop
US3982199A (en) * 1975-01-06 1976-09-21 The Bendix Corporation Digital frequency synthesizer

Also Published As

Publication number Publication date
US4053739A (en) 1977-10-11
JPS5321563A (en) 1978-02-28
CA1097407A (en) 1981-03-10
DE2735204C2 (de) 1986-07-03
SE416695B (sv) 1981-01-26
NL7708804A (nl) 1978-02-14
FR2361778B1 (sv) 1981-02-06
DK355777A (da) 1978-02-12
GB1575664A (en) 1980-09-24
FR2361778A1 (fr) 1978-03-10
DE2735204A1 (de) 1978-02-16

Similar Documents

Publication Publication Date Title
GB1405918A (en) Pulse frequency dividing circuit
GB1488935A (en) Adaptive boolean logic element
ES357212A1 (es) Un metodo de producir tonos de una escala temperada de pre-ferencia aproximadamente por igual.
GB1433050A (en) Binary sequencegenerator compositions suitable for use in the production of porous building structu
CH609201B (fr) Diviseur pour le circuit garde-temps d'une piece d'horlogerie electronique.
ATE2707T1 (de) Digitale frequenzteileranordnung.
GB1333645A (en) Divider circuits
FR2261663A1 (en) Counter unit comprising Johnson counter using register - has register feedback loop including inverter
GB981296A (en) Improvements in or relating to digital registers
GB1323162A (en) Mean-rate indicating apparatus
ES413585A1 (es) Perfeccionamientos en la construccion de dispositivos de deteccion de una frecuencia.
JPS5726930A (en) Odd-number frequency division circuit
JPS54154964A (en) Programable counter
JPS56129431A (en) Frequency dividing circuit for odd number
GB1386294A (en) Flip-flop circuits
SU766018A1 (ru) Делитель частоты следовани импульсов
SU403073A1 (ru) Двухтактный двоичный счетчик
SU641658A1 (ru) Многопрограмный делитель частоты
SU748878A1 (ru) Распределитель импульсов
SU456368A1 (ru) Многоразр дный число-импульсный делитель
SU411653A1 (sv)
GB1123284A (en) Improvements in or relating to buffer registers
JPS5518148A (en) Programmable divider
SU473307A1 (ru) Устройство делени частоты импульсов
SU538492A1 (ru) Счетчик последовательности импульсов

Legal Events

Date Code Title Description
NUG Patent has lapsed

Ref document number: 7708396-2

Effective date: 19880620

Format of ref document f/p: F