SE9602823L - En metod, en apparat och ett nätverk för att återhämta klockan - Google Patents
En metod, en apparat och ett nätverk för att återhämta klockanInfo
- Publication number
- SE9602823L SE9602823L SE9602823A SE9602823A SE9602823L SE 9602823 L SE9602823 L SE 9602823L SE 9602823 A SE9602823 A SE 9602823A SE 9602823 A SE9602823 A SE 9602823A SE 9602823 L SE9602823 L SE 9602823L
- Authority
- SE
- Sweden
- Prior art keywords
- frequency
- adjusted
- network
- arrival
- inter
- Prior art date
Links
- 238000000034 method Methods 0.000 title abstract 2
- 238000011084 recovery Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/091—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector using a sampling device
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/181—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a numerical count result being used for locking the loop, the counter counting during fixed time intervals
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/062—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
- H04J3/0632—Synchronisation of packets and cells, e.g. transmission of voice via a packet network, circuit emulation service [CES]
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q11/00—Selecting arrangements for multiplex systems
- H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
- H04Q11/0428—Integrated services digital network, i.e. systems for transmission of different types of digitised signals, e.g. speech, data, telecentral, television signals
- H04Q11/0478—Provisions for broadband connections
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
- H04L2012/5614—User Network Interface
- H04L2012/5616—Terminal equipment, e.g. codecs, synch.
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
- H04L2012/5672—Multiplexing, e.g. coding, scrambling
- H04L2012/5674—Synchronisation, timing recovery or alignment
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
- H04L2012/5678—Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
- H04L2012/5681—Buffer or queue management
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Multimedia (AREA)
- Computer Hardware Design (AREA)
- Signal Processing (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| SE9602823A SE9602823L (sv) | 1996-07-19 | 1996-07-19 | En metod, en apparat och ett nätverk för att återhämta klockan |
| PCT/SE1997/001168 WO1998004063A2 (en) | 1996-07-19 | 1997-06-27 | A method and an apparatus for recovery of the clock of a constant bit-rate service |
| AU35636/97A AU3563697A (en) | 1996-07-19 | 1997-06-27 | A method, an apparatus and a network for clock recovery |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| SE9602823A SE9602823L (sv) | 1996-07-19 | 1996-07-19 | En metod, en apparat och ett nätverk för att återhämta klockan |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| SE9602823D0 SE9602823D0 (sv) | 1996-07-19 |
| SE9602823L true SE9602823L (sv) | 1998-01-20 |
Family
ID=20403436
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| SE9602823A SE9602823L (sv) | 1996-07-19 | 1996-07-19 | En metod, en apparat och ett nätverk för att återhämta klockan |
Country Status (3)
| Country | Link |
|---|---|
| AU (1) | AU3563697A (sv) |
| SE (1) | SE9602823L (sv) |
| WO (1) | WO1998004063A2 (sv) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2001043334A2 (en) * | 1999-12-13 | 2001-06-14 | Broadcom Corporation | Voice gateway with downstream voice synchronization |
| US7027424B1 (en) | 2000-05-24 | 2006-04-11 | Vtech Communications, Ltd. | Method for avoiding interference in a digital communication system |
| GB0100094D0 (en) * | 2001-01-03 | 2001-02-14 | Vtech Communications Ltd | System clock synchronisation using phased-lock loop |
| GB2401764B (en) * | 2001-01-03 | 2005-06-29 | Vtech Communications Ltd | System clock synchronisation using phase-locked loop |
| DE10232988B4 (de) * | 2002-07-19 | 2007-11-22 | Infineon Technologies Ag | Verfahren und Vorrichtung zur getakteten Ausgabe asynchron empfangener Digitalsignale |
| WO2009010891A1 (en) * | 2007-07-17 | 2009-01-22 | Nxp B.V. | A method and a device for data sample clock reconstruction |
| US8401007B2 (en) | 2009-04-06 | 2013-03-19 | Avaya Inc. | Network synchronization over IP networks |
| US8238377B2 (en) | 2009-04-06 | 2012-08-07 | Avaya Inc. | Network synchronization over IP networks |
| WO2010141514A2 (en) * | 2009-06-01 | 2010-12-09 | Bit Cauldron Corporation | Method of stereoscopic synchronization of active shutter glasses |
| GB201002217D0 (en) | 2010-02-10 | 2010-03-31 | Zarlink Semiconductor Inc | Clock recovery method over packet switched networks based on network quiet period detection |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2682244B1 (fr) * | 1991-10-04 | 1995-01-13 | Cit Alcatel | Dispositif de synchronisation pour equipement d'extremite d'un reseau de telecommunications numerique a transfert en mode asynchrone. |
| US5425061A (en) * | 1993-06-07 | 1995-06-13 | Texas Instruments Incorporated | Method and apparatus for bit stream synchronization |
| JPH0766814A (ja) * | 1993-08-24 | 1995-03-10 | Anritsu Corp | Atmクロック再生装置 |
| NL9401525A (nl) * | 1994-09-21 | 1996-05-01 | Nederland Ptt | Clock recovery voor ATM ontvanger. |
-
1996
- 1996-07-19 SE SE9602823A patent/SE9602823L/sv not_active Application Discontinuation
-
1997
- 1997-06-27 AU AU35636/97A patent/AU3563697A/en not_active Abandoned
- 1997-06-27 WO PCT/SE1997/001168 patent/WO1998004063A2/en not_active Ceased
Also Published As
| Publication number | Publication date |
|---|---|
| WO1998004063A3 (en) | 1998-03-12 |
| WO1998004063A2 (en) | 1998-01-29 |
| AU3563697A (en) | 1998-02-10 |
| SE9602823D0 (sv) | 1996-07-19 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| NAV | Patent application has lapsed |
Ref document number: 9602823-8 |